Lines Matching +full:0 +full:x12000300
33 #size-cells = <0>;
35 PowerPC,8560@0 {
37 reg = <0>;
40 d-cache-size = <0x8000>; /* L1, 32K */
41 i-cache-size = <0x8000>; /* L1, 32K */
42 timebase-frequency = <0>; /* From U-boot */
43 bus-frequency = <0>; /* From U-boot */
44 clock-frequency = <0>; /* From U-boot */
51 reg = <0x00000000 0x10000000>; /* Fixed by bootwrapper */
58 ranges = <0x00000000 0xfdf00000 0x00100000>;
59 bus-frequency = <0>; /* Fixed by bootwrapper */
61 ecm-law@0 {
63 reg = <0x0 0x1000>;
69 reg = <0x1000 0x1000>;
76 reg = <0x2000 0x1000>;
78 interrupts = <0x12 0x2>;
83 reg = <0x20000 0x1000>;
84 cache-line-size = <0x20>; /* 32 bytes */
85 cache-size = <0x40000>; /* L2, 256K */
87 interrupts = <0x10 0x2>;
92 #size-cells = <0>;
93 cell-index = <0>;
95 reg = <0x3000 0x100>;
96 interrupts = <0x2b 0x2>;
105 reg = <0x21300 0x4>;
106 ranges = <0x0 0x21100 0x200>;
107 cell-index = <0>;
108 dma-channel@0 {
111 reg = <0x0 0x80>;
112 cell-index = <0>;
119 reg = <0x80 0x80>;
127 reg = <0x100 0x80>;
135 reg = <0x180 0x80>;
148 reg = <0x24000 0x1000>;
149 ranges = <0x0 0x24000 0x1000>;
152 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
159 #size-cells = <0>;
161 reg = <0x520 0x20>;
165 reg = <0x1>;
170 reg = <0x2>;
174 reg = <0x11>;
186 reg = <0x25000 0x1000>;
187 ranges = <0x0 0x25000 0x1000>;
190 interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
197 #size-cells = <0>;
199 reg = <0x520 0x20>;
202 reg = <0x11>;
209 #address-cells = <0>;
212 reg = <0x40000 0x40000>;
220 reg = <0x919c0 0x30>;
226 ranges = <0x0 0x80000 0x10000>;
228 data@0 {
230 reg = <0x0 0x4000 0x9000 0x2000>;
238 reg = <0x919f0 0x10 0x915f0 0x10>;
243 #address-cells = <0>;
246 interrupts = <0x2e 0x2>;
248 reg = <0x90c00 0x80>;
256 reg = <0x91a00 0x20 0x88000 0x100>;
258 fsl,cpm-command = <0x800000>;
259 current-speed = <0x1c200>;
260 interrupts = <0x28 0x8>;
268 reg = <0x91a20 0x20 0x88100 0x100>;
270 fsl,cpm-command = <0x4a00000>;
271 current-speed = <0x1c200>;
272 interrupts = <0x29 0x8>;
278 #size-cells = <0>;
280 reg = <0x90d00 0x14>;
284 PHY0: ethernet-phy@0 {
286 reg = <0x0>;
294 reg = <0x91300 0x20 0x88400 0x100 0x91390 0x1>;
297 fsl,cpm-command = <0x12000300>;
298 interrupts = <0x20 0x8>;
309 reg = <0xfdf05000 0x68>;
311 ranges = <0x0 0x0 0xe0000000 0x00800000
312 0x4 0x0 0xe8080000 0x00080000>;
314 flash@0,0 {
318 reg = <0x0 0x0 0x800000>;
319 bank-width = <0x2>;
321 partition@0 {
323 reg = <0x0 0x180000>;
327 reg = <0x180000 0x580000>;
331 reg = <0x300000 0x100000>;
336 cpld@4,0 {
338 reg = <0x4 0x0 0x80000>;