dts/fsl/p2020rdb.dts

1 // SPDX-License-Identifier: GPL-2.0-or-later
5  * Copyright 2009-2012 Freescale Semiconductor Inc.
8 /include/ "p2020si-pre.dtsi"
37 			#address-cells = <1>;
38 			#size-cells = <1>;
39 			compatible = "cfi-flash";
41 			bank-width = <2>;
42 			device-width = <1>;
48 				label = "NOR (RO) Vitesse-7385 Firmware";
49 				read-only;
56 				read-only;
63 				read-only;
74 				/* 512KB for u-boot Bootloader Image */
75 				/* 512KB for u-boot Environment Variables */
77 				label = "NOR (RO) U-Boot Image";
78 				read-only;
83 			#address-cells = <1>;
84 			#size-cells = <1>;
85 			compatible = "fsl,p2020-fcm-nand",
86 				     "fsl,elbc-fcm-nand";
91 				/* 1MB for u-boot Bootloader Image */
93 				label = "NAND (RO) U-Boot Image";
94 				read-only;
101 				read-only;
108 				read-only;
115 				read-only;
132 			#address-cells = <1>;
133 			#size-cells = <1>;
134 			compatible = "vitesse-7385";
152 				#address-cells = <1>;
153 				#size-cells = <1>;
154 				compatible = "spansion,s25sl12801", "jedec,spi-nor";
156 				spi-max-frequency = <40000000>;
159 					/* 512KB for u-boot Bootloader Image */
161 					label = "SPI (RO) U-Boot Image";
162 					read-only;
169 					read-only;
176 					read-only;
183 					read-only;
200 			phy0: ethernet-phy@0 {  label
204 			phy1: ethernet-phy@1 {
208 			tbi-phy@2 {
209 				device_type = "tbi-phy";
215 			tbi0: tbi-phy@11 {
217 				device_type = "tbi-phy";
226 			fsl,tclk-period = <5>;
227 			fsl,tmr-prsc = <200>;
228 			fsl,tmr-add = <0xCCCCCCCD>;
229 			fsl,tmr-fiper1 = <0x3B9AC9FB>;
230 			fsl,tmr-fiper2 = <0x0001869B>;
231 			fsl,max-adj = <249999999>;
235 			fixed-link = <1 1 1000 0 0>;
236 			phy-connection-type = "rgmii-id";
240 			tbi-handle = <&tbi0>;
241 			phy-handle = <&phy0>;
242 			phy-connection-type = "sgmii";
246 			phy-handle = <&phy1>;
247 			phy-connection-type = "rgmii-id";
251 	pci0: pcie@ffe08000 {
256 	pci1: pcie@ffe09000 {
260 		pcie@0 {
271 	pci2: pcie@ffe0a000 {
275 		pcie@0 {
287 /include/ "p2020si-post.dtsi"