dts/fsl/p1021mds.dts

1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /include/ "p1021si-pre.dtsi"
32 			#address-cells = <1>;
33 			#size-cells = <1>;
34 			compatible = "fsl,p1021-fcm-nand",
35 				     "fsl,elbc-fcm-nand";
40 				/* 1MB for u-boot Bootloader Image */
42 				label = "NAND (RO) U-Boot Image";
43 				read-only;
50 				read-only;
57 				read-only;
64 				read-only;
83 				read-only;
88 			#address-cells = <1>;
89 			#size-cells = <1>;
90 			compatible = "fsl,p1021mds-bcsr";
96 			compatible = "fsl,p1021mds-pib";
101 			compatible = "fsl,p1021mds-pib";
107 		compatible = "fsl,p1021-immr", "simple-bus";
120 				#address-cells = <1>;
121 				#size-cells = <1>;
122 				compatible = "spansion,s25sl12801", "jedec,spi-nor";
124 				spi-max-frequency = <40000000>; /* input clock */
126 				partition@u-boot {
127 					label = "u-boot-spi";
129 					read-only;
132 					label = "kernel-spi";
134 					read-only;
137 					label = "dtb-spi";
139 					read-only;
142 					label = "file system-spi";
154 			phy0: ethernet-phy@0 {
158 			phy1: ethernet-phy@1 {
162 			phy4: ethernet-phy@4 {
165 			tbi-phy@5 {
166 				device_type = "tbi-phy";
172 			tbi0: tbi-phy@11 {
174 				device_type = "tbi-phy";
179 			phy-handle = <&phy0>;
180 			phy-connection-type = "rgmii-id";
184 			phy-handle = <&phy4>;
185 			tbi-handle = <&tbi0>;
186 			phy-connection-type = "sgmii";
190 			phy-handle = <&phy1>;
191 			phy-connection-type = "rgmii-id";
195 			#address-cells = <1>;
196 			#size-cells = <1>;
200 			num-ports = <3>;
202 				pio-map = <
225 				pio-map = <
274 		brg-frequency = <0>;
275 		bus-frequency = <0>;
281 			local-mac-address = [ 00 00 00 00 00 00 ];
282 			rx-clock-name = "clk12";
283 			tx-clock-name = "clk9";
284 			pio-handle = <&pio1>;
285 			phy-handle = <&qe_phy0>;
286 			phy-connection-type = "mii";
290 			qe_phy0: ethernet-phy@0 {
291 				interrupt-parent = <&mpic>;
295 			qe_phy1: ethernet-phy@3 {
296 				interrupt-parent = <&mpic>;
300 			tbi-phy@11 {
302 				device_type = "tbi-phy";
309 			local-mac-address = [ 00 00 00 00 00 00 ];
310 			rx-clock-name = "none";
311 			tx-clock-name = "clk13";
312 			pio-handle = <&pio2>;
313 			phy-handle = <&qe_phy1>;
314 			phy-connection-type = "rmii";
319 /include/ "p1021si-post.dtsi"