Lines Matching +full:0 +full:xf800

39 	interrupts = <19 2 0 0>;
42 /* controller at 0x8000 */
48 	bus-range = <0 255>;
50 	interrupts = <24 2 0 0>;
52 	pcie@0 {
53 		reg = <0 0 0 0 0>;
58 		interrupts = <24 2 0 0>;
59 		interrupt-map-mask = <0xf800 0 0 7>;
62 			/* IDSEL 0x0 */
63 			0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0
64 			0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0
65 			0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0
66 			0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0
71 /* controller at 0x9000 */
77 	bus-range = <0 255>;
79 	interrupts = <25 2 0 0>;
81 	pcie@0 {
82 		reg = <0 0 0 0 0>;
87 		interrupts = <25 2 0 0>;
88 		interrupt-map-mask = <0xf800 0 0 7>;
91 			/* IDSEL 0x0 */
92 			0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
93 			0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
94 			0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
95 			0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
100 /* controller at 0xa000 */
106 	bus-range = <0 255>;
108 	interrupts = <26 2 0 0>;
110 	pcie@0 {
111 		reg = <0 0 0 0 0>;
116 		interrupts = <26 2 0 0>;
117 		interrupt-map-mask = <0xf800 0 0 7>;
119 			/* IDSEL 0x0 */
120 			0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
121 			0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
122 			0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
123 			0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
133 	bus-frequency = <0>;		// Filled out by uboot.
135 	ecm-law@0 {
137 		reg = <0x0 0x1000>;
143 		reg = <0x1000 0x1000>;
144 		interrupts = <17 2 0 0>;
149 		reg = <0x2000 0x1000>;
150 		interrupts = <18 2 0 0>;
155 		reg = <0x6000 0x1000>;
156 		interrupts = <18 2 0 0>;
159 /include/ "pq3-i2c-0.dtsi"
161 /include/ "pq3-duart-0.dtsi"
163 /include/ "pq3-gpio-0.dtsi"
170 		reg = <0x20000 0x1000>;
172 		cache-size = <0x100000>; // L2,1M
173 		interrupts = <16 2 0 0>;
176 /include/ "pq3-dma-0.dtsi"
177 /include/ "pq3-etsec1-0.dtsi"
178 /include/ "pq3-etsec1-timer-0.dtsi"
181 		interrupts = <68 2 0 0 69 2 0 0 70 2 0 0 71 2 0 0>;
187 /include/ "pq3-sec3.0-0.dtsi"
193 		reg = <0xe0000 0x1000>;