dts/fsl/mpc8568si-post.dtsi

39 	interrupts = <19 2 0 0>;
40 	sleep = <&pmc 0x08000000>;
43 /* controller at 0x8000 */
47 	interrupts = <24 0x2 0 0>;
48 	bus-range = <0 0xff>;
52 	sleep = <&pmc 0x80000000>;
55 /* controller at 0xa000 */
61 	bus-range = <0 255>;
63 	interrupts = <26 2 0 0>;
64 	sleep = <&pmc 0x20000000>;
66 	pcie@0 {
67 		reg = <0 0 0 0 0>;
72 		interrupts = <26 2 0 0>;
73 		interrupt-map-mask = <0xf800 0 0 7>;
75 			/* IDSEL 0x0 */
76 			0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
77 			0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
78 			0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
79 			0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
86 	interrupts = <48 2 0 0>;
90 	sleep = <&pmc 0x00080000>;
105 	bus-frequency = <0>;		// Filled out by uboot.
107 	ecm-law@0 {
109 		reg = <0x0 0x1000>;
115 		reg = <0x1000 0x1000>;
116 		interrupts = <17 2 0 0>;
121 		reg = <0x2000 0x1000>;
122 		interrupts = <18 2 0 0>;
129 		sleep = <&pmc 0x00000004>;
132 /include/ "pq3-i2c-0.dtsi"
141 		sleep = <&pmc 0x00000002>;
144 /include/ "pq3-duart-0.dtsi"
150 		reg = <0x20000 0x1000>;
152 		cache-size = <0x80000>; // L2, 512K
153 		interrupts = <16 2 0 0>;
156 /include/ "pq3-dma-0.dtsi"
158 		sleep = <&pmc 0x00000400>;
161 /include/ "pq3-etsec1-0.dtsi"
163 		sleep = <&pmc 0x00000080>;
168 		sleep = <&pmc 0x00000040>;
172 		reg = <0xe0100 0x100>;
176 /include/ "pq3-sec2.1-0.dtsi"
178 		sleep = <&pmc 0x01000000>;
182 /include/ "pq3-rmu-0.dtsi"
184 		sleep = <&pmc 0x00040000>;
191 		reg = <0xe0000 0x1000>;
192 		ranges = <0 0xe0000 0x1000>;
198 			reg = <0x70 0x20>;
208 	sleep = <&pmc 0x00000800>;
209 	brg-frequency = <0>;
217 		#address-cells = <0>;
219 		reg = <0x80 0x80>;
220 		interrupts = <46 2 0 0 46 2 0 0>; //high:30 low:30
226 		#size-cells = <0>;
228 		reg = <0x4c0 0x40>;
229 		cell-index = <0>;
236 		#size-cells = <0>;
239 		reg = <0x500 0x40>;
246 		reg = <0x2000 0x200>;
253 		reg = <0x3000 0x200>;
262 		ranges = <0x0 0x10000 0x10000>;
264 		data-only@0 {
267 			reg = <0x0 0x10000>;