Lines Matching +full:pcie +full:- +full:x1
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,mpc8544-lbc", "fsl,pq3-localbus", "simple-bus";
44 compatible = "fsl,mpc8540-pci";
47 bus-range = <0 0xff>;
48 #interrupt-cells = <1>;
49 #size-cells = <2>;
50 #address-cells = <3>;
55 compatible = "fsl,mpc8548-pcie";
57 #size-cells = <2>;
58 #address-cells = <3>;
59 bus-range = <0 255>;
60 clock-frequency = <33333333>;
63 pcie@0 {
65 #interrupt-cells = <1>;
66 #size-cells = <2>;
67 #address-cells = <3>;
70 interrupt-map-mask = <0xf800 0 0 7>;
72 interrupt-map = <
74 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
75 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
76 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
77 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
84 compatible = "fsl,mpc8548-pcie";
86 #size-cells = <2>;
87 #address-cells = <3>;
88 bus-range = <0 255>;
89 clock-frequency = <33333333>;
92 pcie@0 {
94 #interrupt-cells = <1>;
95 #size-cells = <2>;
96 #address-cells = <3>;
99 interrupt-map-mask = <0xf800 0 0 7>;
100 interrupt-map = <
102 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
103 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
104 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
105 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
112 compatible = "fsl,mpc8548-pcie";
114 #size-cells = <2>;
115 #address-cells = <3>;
116 bus-range = <0 255>;
117 clock-frequency = <33333333>;
120 pcie@0 {
122 #interrupt-cells = <1>;
123 #size-cells = <2>;
124 #address-cells = <3>;
127 interrupt-map-mask = <0xf800 0 0 7>;
128 interrupt-map = <
130 0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0
131 0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0
132 0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0
133 0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0
139 #address-cells = <1>;
140 #size-cells = <1>;
142 compatible = "fsl,mpc8544-immr", "simple-bus";
143 bus-frequency = <0>; // Filled out by uboot.
145 ecm-law@0 {
146 compatible = "fsl,ecm-law";
148 fsl,num-laws = <10>;
152 compatible = "fsl,mpc8544-ecm", "fsl,ecm";
157 memory-controller@2000 {
158 compatible = "fsl,mpc8544-memory-controller";
163 /include/ "pq3-i2c-0.dtsi"
164 /include/ "pq3-i2c-1.dtsi"
165 /include/ "pq3-duart-0.dtsi"
167 L2: l2-cache-controller@20000 {
168 compatible = "fsl,mpc8544-l2-cache-controller";
170 cache-line-size = <32>; // 32 bytes
171 cache-size = <0x40000>; // L2, 256K
175 /include/ "pq3-dma-0.dtsi"
176 /include/ "pq3-etsec1-0.dtsi"
177 /include/ "pq3-etsec1-2.dtsi"
180 cell-index = <1>;
183 /include/ "pq3-sec2.1-0.dtsi"
184 /include/ "pq3-mpic.dtsi"
186 global-utilities@e0000 {
187 compatible = "fsl,mpc8544-guts";
189 fsl,has-rstcr;
192 /include/ "pq3-power.dtsi"