boot/dts/currituck.dts

11 /dts-v1/;
16 	#address-cells = <2>;
17 	#size-cells = <2>;
20 	dcr-parent = <&{/cpus/cpu@0}>;
27 		#address-cells = <1>;
28 		#size-cells = <0>;
34 			clock-frequency = <1600000000>; // 1.6 GHz
35 			timebase-frequency = <100000000>; // 100Mhz
36 			i-cache-line-size = <32>;
37 			d-cache-line-size = <32>;
38 			i-cache-size = <32768>;
39 			d-cache-size = <32768>;
40 			dcr-controller;
41 			dcr-access-method = "native";
48 			clock-frequency = <1600000000>; // 1.6 GHz
49 			timebase-frequency = <100000000>; // 100Mhz
50 			i-cache-line-size = <32>;
51 			d-cache-line-size = <32>;
52 			i-cache-size = <32768>;
53 			d-cache-size = <32768>;
54 			dcr-controller;
55 			dcr-access-method = "native";
57 			enable-method = "spin-table";
58 			cpu-release-addr = <0x0 0x01f00000>;
67 	MPIC: interrupt-controller {
68 		compatible = "chrp,open-pic";
69 		interrupt-controller;
70 		dcr-reg = <0xffc00000 0x00040000>;
71 		#address-cells = <0>;
72 		#size-cells = <0>;
73 		#interrupt-cells = <2>;
79 		#address-cells = <2>;
80 		#size-cells = <2>;
82 		clock-frequency = <200000000>; // 200Mhz
85 			compatible = "ibm,opb-4xx", "ibm,opb";
86 			#address-cells = <1>;
87 			#size-cells = <1>;
89 			 * 32-bit range
93 			clock-frequency = <100000000>;
99 				virtual-reg = <0xe1000000>;
100 				clock-frequency = <1851851>; // PCIe refclk/MCGC0_CTL[UART]
101 				current-speed = <115200>;
102 				interrupt-parent = <&MPIC>;
107 				compatible = "ibm,currituck-fpga";
112 				compatible = "ibm,iic-currituck", "ibm,iic";
114 				interrupt-parent = <&MPIC>;
116 				#address-cells = <1>;
117 				#size-cells = <0>;
127 			#interrupt-cells = <1>;
128 			#size-cells = <2>;
129 			#address-cells = <3>;
130 			compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex";
135 			dcr-reg = <0x80 0x20>;
142 			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>;
145 			bus-range = <0x0 0xf>;
147 			/* Legacy interrupts (note the weird polarity, the bridge seems
148 			 * to invert PCIe legacy interrupts).
149 			 * We are de-swizzling here because the numbers are actually for
152 			 * below are basically de-swizzled numbers.
155 			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
156 			interrupt-map = <
165 			#interrupt-cells = <1>;
166 			#size-cells = <2>;
167 			#address-cells = <3>;
168 			compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex";
173 			dcr-reg = <0x60 0x20>;
179 			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>;
182 			bus-range = <0x0 0xf>;
184 			/* Legacy interrupts (note the weird polarity, the bridge seems
185 			 * to invert PCIe legacy interrupts).
186 			 * We are de-swizzling here because the numbers are actually for
189 			 * below are basically de-swizzled numbers.
192 			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
193 			interrupt-map = <
202 			#interrupt-cells = <1>;
203 			#size-cells = <2>;
204 			#address-cells = <3>;
205 			compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex";
210 			dcr-reg = <0xA0 0x20>;
216 			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>;
219 			bus-range = <0x0 0xf>;
221 			/* Legacy interrupts (note the weird polarity, the bridge seems
222 			 * to invert PCIe legacy interrupts).
223 			 * We are de-swizzling here because the numbers are actually for
226 			 * below are basically de-swizzled numbers.
229 			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
230 			interrupt-map = <
240 		stdout-path = &UART0;