boot/dts/currituck.dts

13 /memreserve/ 0x01f00000 0x00100000;	// spin table
20 	dcr-parent = <&{/cpus/cpu@0}>;
28 		#size-cells = <0>;
30 		cpu@0 {
33 			reg = <0>;
58 			cpu-release-addr = <0x0 0x01f00000>;
64 		reg = <0x0 0x0 0x0 0x0>; // filled in by zImage
70 		dcr-reg = <0xffc00000 0x00040000>;
71 		#address-cells = <0>;
72 		#size-cells = <0>;
91 			ranges = <0x00000000 0x00000200 0x00000000 0x80000000
92 				  0x80000000 0x00000200 0x80000000 0x80000000>;
98 				reg = <0x10000000 0x00000008>;
99 				virtual-reg = <0xe1000000>;
108 				reg = <0x50000000 0x4>;
111 			IIC0: i2c@0 {
113 				reg = <0x0 0x00000014>;
117 				#size-cells = <0>;
120                                         reg = <0x68>;
132 			port = <0x0>; /* port number */
133 			reg = <0x00000101 0x00000000 0x0 0x10000000		/* Config space access */
134 			       0x00000100 0x00000000 0x0 0x00001000>;	/* UTL Registers space access */
135 			dcr-reg = <0x80 0x20>;
138 			ranges = <0x02000000 0x00000000 0x80000000 0x00000110 0x80000000 0x0 0x80000000
139 			          0x01000000 0x0        0x0        0x00000140 0x0        0x0 0x00010000>;
141 			/* Inbound starting at 0 to memsize filled in by zImage */
142 			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>;
144 			/* This drives busses 0 to 0xf */
145 			bus-range = <0x0 0xf>;
153 			 * The real slot is on idsel 0, so the swizzling is 1:1
155 			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
157 				0x0 0x0 0x0 0x1 &MPIC 46 0x2 /* int A */
158 				0x0 0x0 0x0 0x2 &MPIC 47 0x2 /* int B */
159 				0x0 0x0 0x0 0x3 &MPIC 48 0x2 /* int C */
160 				0x0 0x0 0x0 0x4 &MPIC 49 0x2 /* int D */>;
170 			port = <0x1>; /* port number */
171 			reg = <0x00000301 0x00000000 0x0 0x10000000		/* Config space access */
172 			       0x00000300 0x00000000 0x0 0x00001000>;	/* UTL Registers space access */
173 			dcr-reg = <0x60 0x20>;
175 			ranges = <0x02000000 0x00000000 0x80000000 0x00000310 0x80000000 0x0 0x80000000
176 			          0x01000000 0x0        0x0        0x00000340 0x0        0x0 0x00010000>;
178 			/* Inbound starting at 0 to memsize filled in by zImage */
179 			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>;
181 			/* This drives busses 0 to 0xf */
182 			bus-range = <0x0 0xf>;
190 			 * The real slot is on idsel 0, so the swizzling is 1:1
192 			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
194 				0x0 0x0 0x0 0x1 &MPIC 38 0x2 /* int A */
195 				0x0 0x0 0x0 0x2 &MPIC 39 0x2 /* int B */
196 				0x0 0x0 0x0 0x3 &MPIC 40 0x2 /* int C */
197 				0x0 0x0 0x0 0x4 &MPIC 41 0x2 /* int D */>;
207 			port = <0x2>; /* port number */
208 			reg = <0x00000381 0x00000000 0x0 0x10000000		/* Config space access */
209 			       0x00000380 0x00000000 0x0 0x00001000>;	/* UTL Registers space access */
210 			dcr-reg = <0xA0 0x20>;
212 			ranges = <0x02000000 0x00000000 0x80000000 0x00000390 0x80000000 0x0 0x80000000
213 			          0x01000000 0x0        0x0        0x000003C0 0x0        0x0 0x00010000>;
215 			/* Inbound starting at 0 to memsize filled in by zImage */
216 			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>;
218 			/* This drives busses 0 to 0xf */
219 			bus-range = <0x0 0xf>;
227 			 * The real slot is on idsel 0, so the swizzling is 1:1
229 			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
231 				0x0 0x0 0x0 0x1 &MPIC 54 0x2 /* int A */
232 				0x0 0x0 0x0 0x2 &MPIC 55 0x2 /* int B */
233 				0x0 0x0 0x0 0x3 &MPIC 56 0x2 /* int C */
234 				0x0 0x0 0x0 0x4 &MPIC 57 0x2 /* int D */>;