Lines Matching +full:left +full:- +full:most

1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Linux/PA-RISC Project (http://www.parisc-linux.org/)
5 * Floating-point emulation code
6 * Copyright (C) 2001 Hewlett-Packard (Paul Bame) <bame@debian.org>
15 * Fixed point to Floating-point Converts
38 * Fixed point to Floating-point Converts *
42 * Convert Single Unsigned Fixed to Single Floating-point format
68 * Check word for most significant bit set. Returns in sgl_to_sgl_fcnvuf()
70 * between -1 and 30. in sgl_to_sgl_fcnvuf()
73 /* left justify source, with msb at bit position 0 */ in sgl_to_sgl_fcnvuf()
76 Sgl_set_exponent(result, 30+SGL_BIAS - dst_exponent); in sgl_to_sgl_fcnvuf()
101 * Single Unsigned Fixed to Double Floating-point
127 * Check word for most significant bit set. Returns in sgl_to_dbl_fcnvuf()
129 * between -1 and 30. in sgl_to_dbl_fcnvuf()
132 /* left justify source, with msb at bit position 0 */ in sgl_to_dbl_fcnvuf()
135 Dbl_set_mantissap2(resultp2, src << (32-DBL_EXP_LENGTH)); in sgl_to_dbl_fcnvuf()
136 Dbl_set_exponent(resultp1, (30+DBL_BIAS) - dst_exponent); in sgl_to_dbl_fcnvuf()
142 * Double Unsigned Fixed to Single Floating-point
169 * Check word for most significant bit set. Returns in dbl_to_sgl_fcnvuf()
171 * between -1 and 30. in dbl_to_sgl_fcnvuf()
174 /* left justify source, with msb at bit position 0 */ in dbl_to_sgl_fcnvuf()
185 * Check word for most significant bit set. Returns in dbl_to_sgl_fcnvuf()
187 * between -1 and 30. in dbl_to_sgl_fcnvuf()
191 /* left justify source, with msb at bit position 0 */ in dbl_to_sgl_fcnvuf()
193 Variable_shift_double(srcp1,srcp2,(31-dst_exponent), in dbl_to_sgl_fcnvuf()
199 Sgl_set_exponent(result, (62+SGL_BIAS) - dst_exponent); in dbl_to_sgl_fcnvuf()
224 * Double Unsigned Fixed to Double Floating-point
251 * Check word for most significant bit set. Returns in dbl_to_dbl_fcnvuf()
253 * between -1 and 30. in dbl_to_dbl_fcnvuf()
256 /* left justify source, with msb at bit position 0 */ in dbl_to_dbl_fcnvuf()
267 * Check word for most significant bit set. Returns in dbl_to_dbl_fcnvuf()
269 * between -1 and 30. in dbl_to_dbl_fcnvuf()
272 /* left justify source, with msb at bit position 0 */ in dbl_to_dbl_fcnvuf()
274 Variable_shift_double(srcp1,srcp2,(31-dst_exponent), in dbl_to_dbl_fcnvuf()
281 Dbl_set_exponent(resultp1, (62+DBL_BIAS) - dst_exponent); in dbl_to_dbl_fcnvuf()