376 	unsigned long newbase = R1(regs->iir)?regs->gr[R1(regs->iir)]:0;  in handle_unaligned()
391 				" at ip " RFMT " (iir " RFMT ")\n",  in handle_unaligned()
393 				regs->iaoq[0], regs->iir);  in handle_unaligned()
407 					"(iir " RFMT ")\n",  in handle_unaligned()
408 				regs->ior, (void *)regs->iaoq[0], regs->iir);  in handle_unaligned()
412 	switch (MAJOR_OP(regs->iir))  in handle_unaligned()
417 		if (regs->iir&0x20)  in handle_unaligned()
420 			if (regs->iir&0x1000)		/* short loads */  in handle_unaligned()
421 				if (regs->iir&0x200)  in handle_unaligned()
422 					newbase += IM5_3(regs->iir);  in handle_unaligned()
424 					newbase += IM5_2(regs->iir);  in handle_unaligned()
425 			else if (regs->iir&0x2000)	/* scaled indexed */  in handle_unaligned()
428 				switch (regs->iir & OPCODE1_MASK)  in handle_unaligned()
438 				newbase += (R2(regs->iir)?regs->gr[R2(regs->iir)]:0)<<shift;  in handle_unaligned()
440 				newbase += (R2(regs->iir)?regs->gr[R2(regs->iir)]:0);  in handle_unaligned()
446 		newbase += IM14(regs->iir);  in handle_unaligned()
450 		if (regs->iir&8)  in handle_unaligned()
453 			newbase += IM14(regs->iir&~0xe);  in handle_unaligned()
459 		newbase += IM14(regs->iir&6);  in handle_unaligned()
463 		if (regs->iir&4)  in handle_unaligned()
466 			newbase += IM14(regs->iir&~4);  in handle_unaligned()
472 	switch (regs->iir & OPCODE1_MASK)  in handle_unaligned()
476 		ret = emulate_ldh(regs, R3(regs->iir));  in handle_unaligned()
483 		ret = emulate_ldw(regs, R3(regs->iir), 0);  in handle_unaligned()
487 		ret = emulate_sth(regs, R2(regs->iir));  in handle_unaligned()
492 		ret = emulate_stw(regs, R2(regs->iir), 0);  in handle_unaligned()
500 		ret = emulate_ldd(regs, R3(regs->iir), 0);  in handle_unaligned()
505 		ret = emulate_std(regs, R2(regs->iir), 0);  in handle_unaligned()
513 		ret = emulate_ldw(regs, FR3(regs->iir), 1);  in handle_unaligned()
518 		ret = emulate_ldd(regs, R3(regs->iir), 1);  in handle_unaligned()
525 		ret = emulate_stw(regs, FR3(regs->iir), 1);  in handle_unaligned()
530 		ret = emulate_std(regs, R3(regs->iir), 1);  in handle_unaligned()
540 	switch (regs->iir & OPCODE2_MASK)  in handle_unaligned()
543 		ret = emulate_ldd(regs,R2(regs->iir),1);  in handle_unaligned()
546 		ret = emulate_std(regs, R2(regs->iir),1);  in handle_unaligned()
550 		ret = emulate_ldd(regs, R2(regs->iir),0);  in handle_unaligned()
553 		ret = emulate_std(regs, R2(regs->iir),0);  in handle_unaligned()
557 	switch (regs->iir & OPCODE3_MASK)  in handle_unaligned()
560 		ret = emulate_ldw(regs, R2(regs->iir), 1);  in handle_unaligned()
563 		ret = emulate_ldw(regs, R2(regs->iir), 0);  in handle_unaligned()
567 		ret = emulate_stw(regs, R2(regs->iir),1);  in handle_unaligned()
570 		ret = emulate_stw(regs, R2(regs->iir),0);  in handle_unaligned()
573 	switch (regs->iir & OPCODE4_MASK)  in handle_unaligned()
576 		ret = emulate_ldh(regs, R2(regs->iir));  in handle_unaligned()
580 		ret = emulate_ldw(regs, R2(regs->iir),0);  in handle_unaligned()
583 		ret = emulate_sth(regs, R2(regs->iir));  in handle_unaligned()
587 		ret = emulate_stw(regs, R2(regs->iir),0);  in handle_unaligned()
591 	if (ret == 0 && modify && R1(regs->iir))  in handle_unaligned()
592 		regs->gr[R1(regs->iir)] = newbase;  in handle_unaligned()
596 		printk(KERN_CRIT "Not-handled unaligned insn 0x%08lx\n", regs->iir);  in handle_unaligned()
646 	switch (regs->iir & OPCODE1_MASK) {  in check_unaligned()
664 		switch (regs->iir & OPCODE4_MASK) {  in check_unaligned()