include/asm/assembly.h

26 /* Frame alignment for 32- and 64-bit */
62 #define LDREGM	ldd,mb
136 	zdep	\r, 31-(\sa), 32-(\sa), \t
144 	/* Shift Right for 32-bit. Clobbers upper 32-bit on PA2.0. */
146 	extru \r, 31-(\sa), 32-(\sa), \t
154 	/* Extract unsigned for 32- and 64-bit
155 	 * The extru instruction leaves the most significant 32 bits of the
159 	extrd,u	\r, 32+(\p), \len, \t
165 	/* The depi instruction leaves the most significant 32 bits of the
169 	depdi	\i, 32+(\p), \len, \t
175 	/* The depw instruction leaves the most significant 32 bits of the
179 	depd	\i, 32+(\p), \len, \t
185 	/* load 32-bit 'value' into 'reg' compensating for the ldil
314 	fldd,mb	-8(\regs),       %fr30
315 	fldd,mb	-8(\regs),       %fr29
316 	fldd,mb	-8(\regs),       %fr28
317 	fldd,mb	-8(\regs),       %fr27
318 	fldd,mb	-8(\regs),       %fr26
319 	fldd,mb	-8(\regs),       %fr25
320 	fldd,mb	-8(\regs),       %fr24
321 	fldd,mb	-8(\regs),       %fr23
322 	fldd,mb	-8(\regs),       %fr22
323 	fldd,mb	-8(\regs),       %fr21
324 	fldd,mb	-8(\regs),       %fr20
325 	fldd,mb	-8(\regs),       %fr19
326 	fldd,mb	-8(\regs),       %fr18
327 	fldd,mb	-8(\regs),       %fr17
328 	fldd,mb	-8(\regs),       %fr16
329 	fldd,mb	-8(\regs),       %fr15
330 	fldd,mb	-8(\regs),       %fr14
331 	fldd,mb	-8(\regs),       %fr13
332 	fldd,mb	-8(\regs),       %fr12
333 	fldd,mb	-8(\regs),       %fr11
334 	fldd,mb	-8(\regs),       %fr10
335 	fldd,mb	-8(\regs),       %fr9
336 	fldd,mb	-8(\regs),       %fr8
337 	fldd,mb	-8(\regs),       %fr7
338 	fldd,mb	-8(\regs),       %fr6
339 	fldd,mb	-8(\regs),       %fr5
340 	fldd,mb	-8(\regs),       %fr4
341 	fldd,mb	-8(\regs),       %fr3
342 	fldd,mb	-8(\regs),       %fr2
343 	fldd,mb	-8(\regs),       %fr1
344 	fldd,mb	-8(\regs),       %fr0
361 	fldd,mb	-8(%r30),   %fr21
362 	fldd,mb	-8(%r30),   %fr20
363 	fldd,mb	-8(%r30),   %fr19
364 	fldd,mb	-8(%r30),   %fr18
365 	fldd,mb	-8(%r30),   %fr17
366 	fldd,mb	-8(%r30),   %fr16
367 	fldd,mb	-8(%r30),   %fr15
368 	fldd,mb	-8(%r30),   %fr14
369 	fldd,mb	-8(%r30),   %fr13
370 	fldd,mb	-8(%r30),   %fr12
390 	std	 %r17,	 -32(%r30)
398 	ldd	 -32(%r30),   %r17
413 	ldd,mb	-CALLEE_REG_FRAME_SIZE(%r30),    %r3
457 	ldw,mb	-CALLEE_REG_FRAME_SIZE(%r30),   %r3