Lines Matching +full:edge +full:- +full:triggered
31 #include "ip32-common.h"
36 crime->control; in flush_crime_bus()
41 mace->perif.ctrl.misc; in flush_mace_bus()
47 * IP0 -> software (ignored)
48 * IP1 -> software (ignored)
49 * IP2 -> (irq0) C crime 1.1 all interrupts; crime 1.5 ???
50 * IP3 -> (irq1) X unknown
51 * IP4 -> (irq2) X unknown
52 * IP5 -> (irq3) X unknown
53 * IP6 -> (irq4) X unknown
54 * IP7 -> (irq5) 7 CPU count/compare timer (system timer)
60 * 0 -> 8 Video in 1
61 * 1 -> 9 Video in 2
62 * 2 -> 10 Video out
63 * 3 -> 11 Mace ethernet
64 * 4 -> S SuperIO sub-interrupt
65 * 5 -> M Miscellaneous sub-interrupt
66 * 6 -> A Audio sub-interrupt
67 * 7 -> 15 PCI bridge errors
68 * 8 -> 16 PCI SCSI aic7xxx 0
69 * 9 -> 17 PCI SCSI aic7xxx 1
70 * 10 -> 18 PCI slot 0
71 * 11 -> 19 unused (PCI slot 1)
72 * 12 -> 20 unused (PCI slot 2)
73 * 13 -> 21 unused (PCI shared 0)
74 * 14 -> 22 unused (PCI shared 1)
75 * 15 -> 23 unused (PCI shared 2)
76 * 16 -> 24 GBE0 (E)
77 * 17 -> 25 GBE1 (E)
78 * 18 -> 26 GBE2 (E)
79 * 19 -> 27 GBE3 (E)
80 * 20 -> 28 CPU errors
81 * 21 -> 29 Memory errors
82 * 22 -> 30 RE empty edge (E)
83 * 23 -> 31 RE full edge (E)
84 * 24 -> 32 RE idle edge (E)
85 * 25 -> 33 RE empty level
86 * 26 -> 34 RE full level
87 * 27 -> 35 RE idle level
88 * 28 -> 36 unused (software 0) (E)
89 * 29 -> 37 unused (software 1) (E)
90 * 30 -> 38 unused (software 2) - crime 1.5 CPU SysCorError (E)
91 * 31 -> 39 VICE
96 * 0-7 -> 40-47 Audio
97 * 8 -> 48 RTC
98 * 9 -> 49 Keyboard
99 * 10 -> X Keyboard polled
100 * 11 -> 51 Mouse
101 * 12 -> X Mouse polled
102 * 13-15 -> 53-55 Count/compare timers
103 * 16-19 -> 56-59 Parallel (16 E)
104 * 20-25 -> 60-62 Serial 1 (22 E)
105 * 26-31 -> 66-71 Serial 2 (28 E)
107 * Note that this means IRQs 12-14, 50, and 52 do not exist. This is a
113 * This is for pure CRIME interrupts - ie not MACE. The advantage?
121 unsigned int bit = d->irq - CRIME_IRQ_BASE; in crime_enable_irq()
124 crime->imask = crime_mask; in crime_enable_irq()
129 unsigned int bit = d->irq - CRIME_IRQ_BASE; in crime_disable_irq()
132 crime->imask = crime_mask; in crime_disable_irq()
144 unsigned int bit = d->irq - CRIME_IRQ_BASE; in crime_edge_mask_and_ack_irq()
147 /* Edge triggered interrupts must be cleared. */ in crime_edge_mask_and_ack_irq()
148 crime_int = crime->hard_int; in crime_edge_mask_and_ack_irq()
150 crime->hard_int = crime_int; in crime_edge_mask_and_ack_irq()
173 macepci_mask |= MACEPCI_CONTROL_INT(d->irq - MACEPCI_SCSI0_IRQ); in enable_macepci_irq()
174 mace->pci.control = macepci_mask; in enable_macepci_irq()
175 crime_mask |= 1 << (d->irq - CRIME_IRQ_BASE); in enable_macepci_irq()
176 crime->imask = crime_mask; in enable_macepci_irq()
181 crime_mask &= ~(1 << (d->irq - CRIME_IRQ_BASE)); in disable_macepci_irq()
182 crime->imask = crime_mask; in disable_macepci_irq()
184 macepci_mask &= ~MACEPCI_CONTROL_INT(d->irq - MACEPCI_SCSI0_IRQ); in disable_macepci_irq()
185 mace->pci.control = macepci_mask; in disable_macepci_irq()
195 /* This is used for MACE ISA interrupts. That means bits 4-6 in the
238 pr_debug("maceisa enable: %u\n", d->irq); in enable_maceisa_irq()
240 switch (d->irq) { in enable_maceisa_irq()
253 crime->imask = crime_mask; in enable_maceisa_irq()
254 maceisa_mask |= 1 << (d->irq - MACEISA_AUDIO_SW_IRQ); in enable_maceisa_irq()
255 mace->perif.ctrl.imask = maceisa_mask; in enable_maceisa_irq()
262 maceisa_mask &= ~(1 << (d->irq - MACEISA_AUDIO_SW_IRQ)); in disable_maceisa_irq()
270 crime->imask = crime_mask; in disable_maceisa_irq()
272 mace->perif.ctrl.imask = maceisa_mask; in disable_maceisa_irq()
280 /* edge triggered */ in mask_and_ack_maceisa_irq()
281 mace_int = mace->perif.ctrl.istat; in mask_and_ack_maceisa_irq()
282 mace_int &= ~(1 << (d->irq - MACEISA_AUDIO_SW_IRQ)); in mask_and_ack_maceisa_irq()
283 mace->perif.ctrl.istat = mace_int; in mask_and_ack_maceisa_irq()
302 /* This is used for regular non-ISA, non-PCI MACE interrupts. That means
303 * bits 0-3 and 7 in the CRIME register.
308 unsigned int bit = d->irq - CRIME_IRQ_BASE; in enable_mace_irq()
311 crime->imask = crime_mask; in enable_mace_irq()
316 unsigned int bit = d->irq - CRIME_IRQ_BASE; in disable_mace_irq()
319 crime->imask = crime_mask; in disable_mace_irq()
334 printk("CRIME intr mask: %016lx\n", crime->imask); in ip32_unknown_interrupt()
335 printk("CRIME intr status: %016lx\n", crime->istat); in ip32_unknown_interrupt()
336 printk("CRIME hardware intr register: %016lx\n", crime->hard_int); in ip32_unknown_interrupt()
337 printk("MACE ISA intr mask: %08lx\n", mace->perif.ctrl.imask); in ip32_unknown_interrupt()
338 printk("MACE ISA intr status: %08lx\n", mace->perif.ctrl.istat); in ip32_unknown_interrupt()
339 printk("MACE PCI control register: %08x\n", mace->pci.control); in ip32_unknown_interrupt()
344 printk("Please mail this report to linux-mips@vger.kernel.org\n"); in ip32_unknown_interrupt()
350 /* change this to loop over all edge-triggered irqs, exception masked out ones */
361 BUILD_BUG_ON(CRIME_VICE_IRQ - MACE_VID_IN1_IRQ != 31); in ip32_irq0()
362 BUILD_BUG_ON(MACEISA_SERIAL2_RDMAOR_IRQ - MACEISA_AUDIO_SW_IRQ != 31); in ip32_irq0()
364 crime_int = crime->istat & crime_mask; in ip32_irq0()
373 unsigned long mace_int = mace->perif.ctrl.istat; in ip32_irq0()
430 crime->imask = 0; in arch_init_irq()
431 crime->hard_int = 0; in arch_init_irq()
432 crime->soft_int = 0; in arch_init_irq()
433 mace->perif.ctrl.istat = 0; in arch_init_irq()
434 mace->perif.ctrl.imask = 0; in arch_init_irq()
468 "edge"); in arch_init_irq()
477 "edge"); in arch_init_irq()