69 	 * Starting with a bus-address, save secondary cache (indexed by  in save_cache_tags()
75 	tag[0].lo = read_c0_taglo();	/* PA[35:18], VA[13:12] */  in save_cache_tags()
78 	tag[1].lo = read_c0_taglo();	/* PA[35:18], VA[13:12] */  in save_cache_tags()
86 	 * than relying on VA[13:12] from the secondary cache tags to pick  in save_cache_tags()
89 	addr &= (0xffL << 56) | ((1 << 12) - 1);  in save_cache_tags()
91 	for (i = 0; i < 4; ++i, addr += (1 << 12)) {  in save_cache_tags()
93 		tag[0].lo = read_c0_taglo();	/* PA[35:12] */  in save_cache_tags()
96 		tag[1].lo = read_c0_taglo();	/* PA[35:12] */  in save_cache_tags()
105 	addr &= (0xffL << 56) | ((1 << 12) - 1);  in save_cache_tags()
107 	for (i = 0; i < 4; ++i, addr += (1 << 12)) {  in save_cache_tags()
109 		tag[0].lo = read_c0_taglo();	/* PA[35:12] */  in save_cache_tags()
112 		tag[1].lo = read_c0_taglo();	/* PA[35:12] */  in save_cache_tags()
177 	/* PA[31:12] shifted to PTag0 (PA[35:12]) format */  in print_cache_tags()
180 	scb = cache_tags.err_addr & ((1 << 12) - 1) & ~((1 << 5) - 1);  in print_cache_tags()
181 	for (i = 0; i < 4; ++i) { /* for each possible VA[13:12] value */  in print_cache_tags()
189 			scb | (1 << 12)*i);  in print_cache_tags()
191 	scb = cache_tags.err_addr & ((1 << 12) - 1) & ~((1 << 6) - 1);  in print_cache_tags()
192 	for (i = 0; i < 4; ++i) { /* for each possible VA[13:12] value */  in print_cache_tags()
200 			scb | (1 << 12)*i);  in print_cache_tags()
314 			unsigned int pgsz = (ctl & 2) ? 14:12; /* 16k:4k */  in check_microtlb()
315 			/* PTEIndex is VPN-low (bits [22:14]/[20:12] ?) */  in check_microtlb()
316 			unsigned long pte = (lo >> 6) << 12; /* PTEBase */  in check_microtlb()
324 				unsigned long a = *(unsigned long *)  in check_microtlb()  local
326 				a = (a & 0x3f) << 6; /* PFN */  in check_microtlb()
327 				a += vaddr & ((1 << pgsz) - 1);  in check_microtlb()
328 				return cpu_err_addr == a;  in check_microtlb()
338 		u32 a = sgimc->maddronly;  in check_vdma_memaddr()  local
341 			return cpu_err_addr == a;  in check_vdma_memaddr()
343 		if (check_microtlb(sgimc->dtlb_hi0, sgimc->dtlb_lo0, a) ||  in check_vdma_memaddr()
344 		    check_microtlb(sgimc->dtlb_hi1, sgimc->dtlb_lo1, a) ||  in check_vdma_memaddr()
345 		    check_microtlb(sgimc->dtlb_hi2, sgimc->dtlb_lo2, a) ||  in check_vdma_memaddr()
346 		    check_microtlb(sgimc->dtlb_hi3, sgimc->dtlb_lo3, a))  in check_vdma_memaddr()
355 		u32 a = sgimc->gio_dma_trans;  in check_vdma_gioaddr()  local
356 		a = (sgimc->gmaddronly & ~a) | (sgimc->gio_dma_sbits & a);  in check_vdma_gioaddr()
357 		return gio_err_addr == a;  in check_vdma_gioaddr()
364  * if the error happened during a CPU read, it also asserts the bus error
375 	 * Try to find out, whether we got here by a mispredicted speculative  in ip28_be_interrupt()
428 	/* A speculative bus error... */  in ip28_be_interrupt()
458 	 * i.e. by a bus error exception without a bus error interrupt.  in ip28_be_handler()