15 #include "pci-bcm63xx.h"
18  * swizzle 32bits data to return only the needed part
20 static int postprocess_read(u32 data, int where, unsigned int size)  in postprocess_read()  argument
27 		ret = (data >> ((where & 3) << 3)) & 0xff;  in postprocess_read()
30 		ret = (data >> ((where & 3) << 3)) & 0xffff;  in postprocess_read()
33 		ret = data;  in postprocess_read()
90 	/* type 0 cycle for local bus, type 1 cycle for anything else */  in bcm63xx_setup_cfg_access()
92 		/* FIXME: how to specify bus ??? */  in bcm63xx_setup_cfg_access()
104 	u32 data;  in bcm63xx_do_cfg_read()  local
106 	/* two phase cycle, first we write address, then read data at  in bcm63xx_do_cfg_read()
112 	data = le32_to_cpu(__raw_readl(pci_iospace_start));  in bcm63xx_do_cfg_read()
116 	*val = postprocess_read(data, where, size);  in bcm63xx_do_cfg_read()
125 	u32 data;  in bcm63xx_do_cfg_write()  local
127 	/* two phase cycle, first we write address, then write data to  in bcm63xx_do_cfg_write()
134 	data = le32_to_cpu(__raw_readl(pci_iospace_start));  in bcm63xx_do_cfg_write()
135 	data = preprocess_write(data, val, where, size);  in bcm63xx_do_cfg_write()
137 	__raw_writel(cpu_to_le32(data), pci_iospace_start);  in bcm63xx_do_cfg_write()
147 static int bcm63xx_pci_read(struct pci_bus *bus, unsigned int devfn,  in bcm63xx_pci_read()  argument
152 	type = bus->parent ? 1 : 0;  in bcm63xx_pci_read()
157 	return bcm63xx_do_cfg_read(type, bus->number, devfn,  in bcm63xx_pci_read()
161 static int bcm63xx_pci_write(struct pci_bus *bus, unsigned int devfn,  in bcm63xx_pci_write()  argument
166 	type = bus->parent ? 1 : 0;  in bcm63xx_pci_write()
171 	return bcm63xx_do_cfg_write(type, bus->number, devfn,  in bcm63xx_pci_write()
186 static int fake_cb_bridge_bus_number = -1;
211 	u32 data;  in fake_cb_bridge_read()  local
213 	data = 0;  in fake_cb_bridge_read()
219 		data = (bcm63xx_get_cpu_id() << 16) | PCI_VENDOR_ID_BROADCOM;  in fake_cb_bridge_read()
223 		data = (PCI_STATUS_DEVSEL_SLOW << 16);  in fake_cb_bridge_read()
224 		data |= fake_cb_bridge_regs.pci_command;  in fake_cb_bridge_read()
228 		data = (PCI_CLASS_BRIDGE_CARDBUS << 16);  in fake_cb_bridge_read()
232 		data = (PCI_HEADER_TYPE_CARDBUS << 16);  in fake_cb_bridge_read()
237 		data = (fake_cb_bridge_regs.bridge_control << 16);  in fake_cb_bridge_read()
239 		data |= (0x1 << 8) | 0xff;  in fake_cb_bridge_read()
243 		data = (fake_cb_bridge_regs.cb_latency << 24);  in fake_cb_bridge_read()
244 		data |= (fake_cb_bridge_regs.subordinate_busn << 16);  in fake_cb_bridge_read()
245 		data |= (fake_cb_bridge_regs.cardbus_busn << 8);  in fake_cb_bridge_read()
246 		data |= fake_cb_bridge_regs.pci_busn;  in fake_cb_bridge_read()
250 		data = fake_cb_bridge_regs.mem_base0;  in fake_cb_bridge_read()
254 		data = fake_cb_bridge_regs.mem_limit0;  in fake_cb_bridge_read()
258 		data = fake_cb_bridge_regs.mem_base1;  in fake_cb_bridge_read()
262 		data = fake_cb_bridge_regs.mem_limit1;  in fake_cb_bridge_read()
267 		data = fake_cb_bridge_regs.io_base0 | 0x1;  in fake_cb_bridge_read()
271 		data = fake_cb_bridge_regs.io_limit0;  in fake_cb_bridge_read()
276 		data = fake_cb_bridge_regs.io_base1 | 0x1;  in fake_cb_bridge_read()
280 		data = fake_cb_bridge_regs.io_limit1;  in fake_cb_bridge_read()
284 	*val = postprocess_read(data, where, size);  in fake_cb_bridge_read()
294 	u32 data, tmp;  in fake_cb_bridge_write()  local
297 	ret = fake_cb_bridge_read((where & ~0x3), 4, &data);  in fake_cb_bridge_write()
301 	data = preprocess_write(data, val, where, size);  in fake_cb_bridge_write()
306 		fake_cb_bridge_regs.pci_command = (data & 0xffff);  in fake_cb_bridge_write()
310 		fake_cb_bridge_regs.cb_latency = (data >> 24) & 0xff;  in fake_cb_bridge_write()
311 		fake_cb_bridge_regs.subordinate_busn = (data >> 16) & 0xff;  in fake_cb_bridge_write()
312 		fake_cb_bridge_regs.cardbus_busn = (data >> 8) & 0xff;  in fake_cb_bridge_write()
313 		fake_cb_bridge_regs.pci_busn = data & 0xff;  in fake_cb_bridge_write()
319 		tmp = (data >> 16) & 0xffff;  in fake_cb_bridge_write()
327 		fake_cb_bridge_regs.mem_base0 = data;  in fake_cb_bridge_write()
331 		fake_cb_bridge_regs.mem_limit0 = data;  in fake_cb_bridge_write()
335 		fake_cb_bridge_regs.mem_base1 = data;  in fake_cb_bridge_write()
339 		fake_cb_bridge_regs.mem_limit1 = data;  in fake_cb_bridge_write()
343 		fake_cb_bridge_regs.io_base0 = data;  in fake_cb_bridge_write()
347 		fake_cb_bridge_regs.io_limit0 = data;  in fake_cb_bridge_write()
351 		fake_cb_bridge_regs.io_base1 = data;  in fake_cb_bridge_write()
355 		fake_cb_bridge_regs.io_limit1 = data;  in fake_cb_bridge_write()
362 static int bcm63xx_cb_read(struct pci_bus *bus, unsigned int devfn,  in bcm63xx_cb_read()  argument
365 	/* snoop access to slot 0x1e on root bus, we fake a cardbus  in bcm63xx_cb_read()
367 	if (!bus->parent && PCI_SLOT(devfn) == FAKE_CB_BRIDGE_SLOT) {  in bcm63xx_cb_read()
368 		fake_cb_bridge_bus_number = bus->number;  in bcm63xx_cb_read()
374 	 * bus. This means that only  one device can be on the cardbus  in bcm63xx_cb_read()
375 	 * bus */  in bcm63xx_cb_read()
377 	    bus->number == fake_cb_bridge_regs.cardbus_busn &&  in bcm63xx_cb_read()
386 static int bcm63xx_cb_write(struct pci_bus *bus, unsigned int devfn,  in bcm63xx_cb_write()  argument
389 	if (!bus->parent && PCI_SLOT(devfn) == FAKE_CB_BRIDGE_SLOT) {  in bcm63xx_cb_write()
390 		fake_cb_bridge_bus_number = bus->number;  in bcm63xx_cb_write()
395 	    bus->number == fake_cb_bridge_regs.cardbus_busn &&  in bcm63xx_cb_write()
415 	static int io_window = -1;  in bcm63xx_fixup()
431 	/* skip our fake bus with only cardbus bridge on it */  in bcm63xx_fixup()
432 	if (dev->bus->number == fake_cb_bridge_bus_number)  in bcm63xx_fixup()
435 	/* find on which bus the device is */  in bcm63xx_fixup()
437 	    dev->bus->number == fake_cb_bridge_regs.cardbus_busn &&  in bcm63xx_fixup()
438 	    PCI_SLOT(dev->devfn) == 0)  in bcm63xx_fixup()
446 	if (io_window != -1) {  in bcm63xx_fixup()
468 static int bcm63xx_pcie_can_access(struct pci_bus *bus, int devfn)  in bcm63xx_pcie_can_access()  argument
470 	switch (bus->number) {  in bcm63xx_pcie_can_access()
483 static int bcm63xx_pcie_read(struct pci_bus *bus, unsigned int devfn,  in bcm63xx_pcie_read()  argument
486 	u32 data;  in bcm63xx_pcie_read()  local
489 	if (!bcm63xx_pcie_can_access(bus, devfn))  in bcm63xx_pcie_read()
492 	if (bus->number == PCIE_BUS_DEVICE)  in bcm63xx_pcie_read()
495 	data = bcm_pcie_readl(reg);  in bcm63xx_pcie_read()
497 	*val = postprocess_read(data, where, size);  in bcm63xx_pcie_read()
503 static int bcm63xx_pcie_write(struct pci_bus *bus, unsigned int devfn,  in bcm63xx_pcie_write()  argument
506 	u32 data;  in bcm63xx_pcie_write()  local
509 	if (!bcm63xx_pcie_can_access(bus, devfn))  in bcm63xx_pcie_write()
512 	if (bus->number == PCIE_BUS_DEVICE)  in bcm63xx_pcie_write()
516 	data = bcm_pcie_readl(reg);  in bcm63xx_pcie_write()
518 	data = preprocess_write(data, val, where, size);  in bcm63xx_pcie_write()
519 	bcm_pcie_writel(data, reg);  in bcm63xx_pcie_write()