mips/pci/fixup-cobalt.c

33  * The Cobalt board ID information.  The boards have an ID number wired
42  * document "GT-64111 System Controller for RC4640, RM523X and VR4300 CPUs",
47  *   Code does not cause a problem for these non-compliant BIOSes, so we used
48  *   this as the default in the GT-64111.
56 	if (dev->devfn == PCI_DEVFN(0, 0) &&  in qube_raq_galileo_early_fixup()
57 		(dev->class >> 8) == PCI_CLASS_MEMORY_OTHER) {  in qube_raq_galileo_early_fixup()
59 		dev->class = (PCI_CLASS_BRIDGE_HOST << 8) | (dev->class & 0xff);  in qube_raq_galileo_early_fixup()
93 	if (dev->devfn != PCI_DEVFN(0, 0))  in qube_raq_galileo_fixup()
96 	/* Fix PCI latency-timer and cache-line-size values in Galileo  in qube_raq_galileo_fixup()
108 	 * --x--x--x--x--x--x--x--x--x--x--x--x--x--x--x--x--x--x--x--x--  in qube_raq_galileo_fixup()
118 	printk(KERN_INFO "Galileo: revision %u\n", dev->revision);  in qube_raq_galileo_fixup()
121 	if (dev->revision >= 0x10) {  in qube_raq_galileo_fixup()
124 	} else if (dev->revision == 0x1 || dev->revision == 0x2)  in qube_raq_galileo_fixup()
128 		/* XXX WE MUST DO THIS ELSE GALILEO LOCKS UP! -DaveM */  in qube_raq_galileo_fixup()
148 	u8 id;  in qube_raq_via_board_id_fixup()  local
151 	retval = pci_read_config_byte(dev, VIA_COBALT_BRD_ID_REG, &id);  in qube_raq_via_board_id_fixup()
153 		panic("Cannot read board ID");  in qube_raq_via_board_id_fixup()
157 	cobalt_board_id = VIA_COBALT_BRD_REG_to_ID(id);  in qube_raq_via_board_id_fixup()
159 	printk(KERN_INFO "Cobalt board ID: %d\n", cobalt_board_id);  in qube_raq_via_board_id_fixup()