1 // SPDX-License-Identifier: GPL-2.0
10 #include <asm/cpu-type.h>
17 #include <asm/mips-cps.h>
38 	unsigned long almask = ~(lsize - 1);  in mips_sc_inv()
41 	cache_op(Hit_Writeback_Inv_SD, (addr + size - 1) & almask);  in mips_sc_inv()
64 	 * prefetching for both code & data, for all ports.  in mips_sc_prefetch_enable()
113  * MTI's L2 controller and the L2 cache controller of Broadcom's BMIPS
116  * true on all platforms.  In an act of stupidity the spec defined bits
143 		c->scache.linesz = 2 << tmp;  in mips_sc_is_activated()
153 	unsigned long sets, line_sz, assoc;  in mips_sc_probe_cm3()  local
158 	sets = cfg & CM_GCR_L2_CONFIG_SET_SIZE;  in mips_sc_probe_cm3()
159 	sets >>= __ffs(CM_GCR_L2_CONFIG_SET_SIZE);  in mips_sc_probe_cm3()
160 	if (sets)  in mips_sc_probe_cm3()
161 		c->scache.sets = 64 << sets;  in mips_sc_probe_cm3()
166 		c->scache.linesz = 2 << line_sz;  in mips_sc_probe_cm3()
170 	c->scache.ways = assoc + 1;  in mips_sc_probe_cm3()
171 	c->scache.waysize = c->scache.sets * c->scache.linesz;  in mips_sc_probe_cm3()
172 	c->scache.waybit = __ffs(c->scache.waysize);  in mips_sc_probe_cm3()
174 	if (c->scache.linesz) {  in mips_sc_probe_cm3()
175 		c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT;  in mips_sc_probe_cm3()
176 		c->options |= MIPS_CPU_INCLUSIVE_CACHES;  in mips_sc_probe_cm3()
190 	c->scache.flags |= MIPS_CACHE_NOT_PRESENT;  in mips_sc_probe()
196 	if (!(c->isa_level & (MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M64R1 |  in mips_sc_probe()
214 		c->scache.sets = 64 << tmp;  in mips_sc_probe()
220 		c->scache.ways = tmp + 1;  in mips_sc_probe()
227 		 * According to config2 it would be 5-ways, but that is  in mips_sc_probe()
232 			c->scache.ways = 4;  in mips_sc_probe()
236 		 * According to config2 it would be 5-ways and 512-sets,  in mips_sc_probe()
241 			c->scache.sets = 256;  in mips_sc_probe()
242 			c->scache.ways = 4;  in mips_sc_probe()
247 	c->scache.waysize = c->scache.sets * c->scache.linesz;  in mips_sc_probe()
248 	c->scache.waybit = __ffs(c->scache.waysize);  in mips_sc_probe()
250 	c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT;  in mips_sc_probe()