Lines Matching +full:n +full:- +full:1
1 // SPDX-License-Identifier: GPL-2.0
3 * sc-ip22.c: Indy cache management functions.
26 #define CI_MASK (SC_SIZE - SC_LINE)
27 #define SC_INDEX(n) ((n) & CI_MASK) argument
34 " .set push # indy_sc_wipe \n" in indy_sc_wipe()
35 " .set noreorder \n" in indy_sc_wipe()
36 " .set mips3 \n" in indy_sc_wipe()
37 " .set noat \n" in indy_sc_wipe()
38 " mfc0 %2, $12 \n" in indy_sc_wipe()
39 " li $1, 0x80 # Go 64 bit \n" in indy_sc_wipe()
40 " mtc0 $1, $12 \n" in indy_sc_wipe()
41 " \n" in indy_sc_wipe()
42 " # \n" in indy_sc_wipe()
43 " # Open code a dli $1, 0x9000000080000000 \n" in indy_sc_wipe()
44 " # \n" in indy_sc_wipe()
45 " # Required because binutils 2.25 will happily accept \n" in indy_sc_wipe()
46 " # 64 bit instructions in .set mips3 mode but puke on \n" in indy_sc_wipe()
47 " # 64 bit constants when generating 32 bit ELF \n" in indy_sc_wipe()
48 " # \n" in indy_sc_wipe()
49 " lui $1,0x9000 \n" in indy_sc_wipe()
50 " dsll $1,$1,0x10 \n" in indy_sc_wipe()
51 " ori $1,$1,0x8000 \n" in indy_sc_wipe()
52 " dsll $1,$1,0x10 \n" in indy_sc_wipe()
53 " \n" in indy_sc_wipe()
54 " or %0, $1 # first line to flush \n" in indy_sc_wipe()
55 " or %1, $1 # last line to flush \n" in indy_sc_wipe()
56 " .set at \n" in indy_sc_wipe()
57 " \n" in indy_sc_wipe()
58 "1: sw $0, 0(%0) \n" in indy_sc_wipe()
59 " bne %0, %1, 1b \n" in indy_sc_wipe()
60 " daddu %0, 32 \n" in indy_sc_wipe()
61 " \n" in indy_sc_wipe()
62 " mtc0 %2, $12 # Back to 32 bit \n" in indy_sc_wipe()
63 " nop # pipeline hazard \n" in indy_sc_wipe()
64 " nop \n" in indy_sc_wipe()
65 " nop \n" in indy_sc_wipe()
66 " nop \n" in indy_sc_wipe()
67 " .set pop \n" in indy_sc_wipe()
69 : "0" (first), "1" (last)); in indy_sc_wipe()
86 last_line = SC_INDEX(addr + size - 1); in indy_sc_wback_invalidate()
94 indy_sc_wipe(first_line, SC_SIZE - SC_LINE); in indy_sc_wback_invalidate()
106 printk("Enabling R4600 SCACHE\n"); in indy_sc_enable()
109 ".set\tpush\n\t" in indy_sc_enable()
110 ".set\tnoreorder\n\t" in indy_sc_enable()
111 ".set\tmips3\n\t" in indy_sc_enable()
112 "mfc0\t%2, $12\n\t" in indy_sc_enable()
113 "nop; nop; nop; nop;\n\t" in indy_sc_enable()
114 "li\t%1, 0x80\n\t" in indy_sc_enable()
115 "mtc0\t%1, $12\n\t" in indy_sc_enable()
116 "nop; nop; nop; nop;\n\t" in indy_sc_enable()
117 "li\t%0, 0x1\n\t" in indy_sc_enable()
118 "dsll\t%0, 31\n\t" in indy_sc_enable()
119 "lui\t%1, 0x9000\n\t" in indy_sc_enable()
120 "dsll32\t%1, 0\n\t" in indy_sc_enable()
121 "or\t%0, %1, %0\n\t" in indy_sc_enable()
122 "sb\t$0, 0(%0)\n\t" in indy_sc_enable()
123 "mtc0\t$0, $12\n\t" in indy_sc_enable()
124 "nop; nop; nop; nop;\n\t" in indy_sc_enable()
125 "mtc0\t%2, $12\n\t" in indy_sc_enable()
126 "nop; nop; nop; nop;\n\t" in indy_sc_enable()
136 printk("Disabling R4600 SCACHE\n"); in indy_sc_disable()
139 ".set\tpush\n\t" in indy_sc_disable()
140 ".set\tnoreorder\n\t" in indy_sc_disable()
141 ".set\tmips3\n\t" in indy_sc_disable()
142 "li\t%0, 0x1\n\t" in indy_sc_disable()
143 "dsll\t%0, 31\n\t" in indy_sc_disable()
144 "lui\t%1, 0x9000\n\t" in indy_sc_disable()
145 "dsll32\t%1, 0\n\t" in indy_sc_disable()
146 "or\t%0, %1, %0\n\t" in indy_sc_disable()
147 "mfc0\t%2, $12\n\t" in indy_sc_disable()
148 "nop; nop; nop; nop\n\t" in indy_sc_disable()
149 "li\t%1, 0x80\n\t" in indy_sc_disable()
150 "mtc0\t%1, $12\n\t" in indy_sc_disable()
151 "nop; nop; nop; nop\n\t" in indy_sc_disable()
152 "sh\t$0, 0(%0)\n\t" in indy_sc_disable()
153 "mtc0\t$0, $12\n\t" in indy_sc_disable()
154 "nop; nop; nop; nop\n\t" in indy_sc_disable()
155 "mtc0\t%2, $12\n\t" in indy_sc_disable()
156 "nop; nop; nop; nop\n\t" in indy_sc_disable()
163 unsigned int size = ip22_eeprom_read(&sgimc->eeprom, 17); in indy_sc_probe()
168 printk(KERN_INFO "R4600/R5000 SCACHE size %dK, linesize 32 bytes.\n", in indy_sc_probe()
172 return 1; in indy_sc_probe()