Lines Matching refs:xcp
782 static inline int cop1_64bit(struct pt_regs *xcp) in cop1_64bit() argument
800 if (cop1_64bit(xcp) && !hybrid_fprs()) \
808 if (cop1_64bit(xcp) && !hybrid_fprs()) { \
829 ((di) = get_fpr64(&ctx->fpr[(x) & ~(cop1_64bit(xcp) ^ 1)], 0))
834 fpr = (x) & ~(cop1_64bit(xcp) ^ 1); \
848 static inline void cop1_cfc(struct pt_regs *xcp, struct mips_fpu_struct *ctx, in cop1_cfc() argument
858 (void *)xcp->cp0_epc, MIPSInst_RT(ir), value); in cop1_cfc()
868 (void *)xcp->cp0_epc, MIPSInst_RT(ir), value); in cop1_cfc()
876 (void *)xcp->cp0_epc, MIPSInst_RT(ir), value); in cop1_cfc()
887 (void *)xcp->cp0_epc, MIPSInst_RT(ir), value); in cop1_cfc()
899 xcp->regs[MIPSInst_RT(ir)] = value; in cop1_cfc()
905 static inline void cop1_ctc(struct pt_regs *xcp, struct mips_fpu_struct *ctx, in cop1_ctc() argument
915 value = xcp->regs[MIPSInst_RT(ir)]; in cop1_ctc()
920 (void *)xcp->cp0_epc, MIPSInst_RT(ir), value); in cop1_ctc()
931 (void *)xcp->cp0_epc, MIPSInst_RT(ir), value); in cop1_ctc()
942 (void *)xcp->cp0_epc, MIPSInst_RT(ir), value); in cop1_ctc()
951 (void *)xcp->cp0_epc, MIPSInst_RT(ir), value); in cop1_ctc()
971 static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx, in cop1Emulate() argument
974 unsigned long contpc = xcp->cp0_epc + dec_insn.pc_inc; in cop1Emulate()
993 if (delay_slot(xcp)) { in cop1Emulate()
995 if (!mm_isBranchInstr(xcp, dec_insn, &contpc)) in cop1Emulate()
996 clear_delay_slot(xcp); in cop1Emulate()
998 if (!isBranchInstr(xcp, dec_insn, &contpc)) in cop1Emulate()
999 clear_delay_slot(xcp); in cop1Emulate()
1003 if (delay_slot(xcp)) { in cop1Emulate()
1046 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, xcp, 0); in cop1Emulate()
1050 dva = (u64 __user *) (xcp->regs[MIPSInst_RS(ir)] + in cop1Emulate()
1068 dva = (u64 __user *) (xcp->regs[MIPSInst_RS(ir)] + in cop1Emulate()
1085 wva = (u32 __user *) (xcp->regs[MIPSInst_RS(ir)] + in cop1Emulate()
1102 wva = (u32 __user *) (xcp->regs[MIPSInst_RS(ir)] + in cop1Emulate()
1126 DIFROMREG(xcp->regs[MIPSInst_RT(ir)], in cop1Emulate()
1136 DITOREG(xcp->regs[MIPSInst_RT(ir)], MIPSInst_RD(ir)); in cop1Emulate()
1145 SIFROMHREG(xcp->regs[MIPSInst_RT(ir)], in cop1Emulate()
1155 SITOHREG(xcp->regs[MIPSInst_RT(ir)], MIPSInst_RD(ir)); in cop1Emulate()
1161 SIFROMREG(xcp->regs[MIPSInst_RT(ir)], in cop1Emulate()
1168 SITOREG(xcp->regs[MIPSInst_RT(ir)], MIPSInst_RD(ir)); in cop1Emulate()
1173 cop1_cfc(xcp, ctx, ir); in cop1Emulate()
1178 cop1_ctc(xcp, ctx, ir); in cop1Emulate()
1186 if (!cpu_has_mips_r6 || delay_slot(xcp)) in cop1Emulate()
1206 if (delay_slot(xcp)) in cop1Emulate()
1233 set_delay_slot(xcp); in cop1Emulate()
1245 bcpc = xcp->cp0_epc; in cop1Emulate()
1246 xcp->cp0_epc += dec_insn.pc_inc; in cop1Emulate()
1251 contpc = (xcp->cp0_epc + (contpc << 1)); in cop1Emulate()
1271 sig = mips_dsemul(xcp, ir, in cop1Emulate()
1276 xcp->cp0_epc = bcpc; in cop1Emulate()
1284 contpc = (xcp->cp0_epc + (contpc << 2)); in cop1Emulate()
1319 xcp->cp0_epc = bcpc; in cop1Emulate()
1327 sig = mips_dsemul(xcp, ir, bcpc, contpc); in cop1Emulate()
1331 xcp->cp0_epc = bcpc; in cop1Emulate()
1339 xcp->cp0_epc += dec_insn.pc_inc; in cop1Emulate()
1353 sig = fpu_emu(xcp, ctx, ir); in cop1Emulate()
1363 sig = fpux_emu(xcp, ctx, ir, fault_addr); in cop1Emulate()
1376 xcp->regs[MIPSInst_RD(ir)] = in cop1Emulate()
1377 xcp->regs[MIPSInst_RS(ir)]; in cop1Emulate()
1384 xcp->cp0_epc = contpc; in cop1Emulate()
1385 clear_delay_slot(xcp); in cop1Emulate()
1463 static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, in fpux_emu() argument
1480 va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] + in fpux_emu()
1481 xcp->regs[MIPSInst_FT(ir)]); in fpux_emu()
1498 va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] + in fpux_emu()
1499 xcp->regs[MIPSInst_FT(ir)]); in fpux_emu()
1589 va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] + in fpux_emu()
1590 xcp->regs[MIPSInst_FT(ir)]); in fpux_emu()
1607 va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] + in fpux_emu()
1608 xcp->regs[MIPSInst_FT(ir)]); in fpux_emu()
1682 static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, in fpu_emu() argument
1771 if (xcp->regs[MIPSInst_FT(ir)] != 0) in fpu_emu()
1780 if (xcp->regs[MIPSInst_FT(ir)] == 0) in fpu_emu()
2143 if (xcp->regs[MIPSInst_FT(ir)] != 0) in fpu_emu()
2151 if (xcp->regs[MIPSInst_FT(ir)] == 0) in fpu_emu()
2837 int fpu_emulator_cop1Handler(struct pt_regs *xcp, struct mips_fpu_struct *ctx, in fpu_emulator_cop1Handler() argument
2853 oldepc = xcp->cp0_epc; in fpu_emulator_cop1Handler()
2855 prevepc = xcp->cp0_epc; in fpu_emulator_cop1Handler()
2862 if ((get_user(instr[0], (u16 __user *)msk_isa16_mode(xcp->cp0_epc))) || in fpu_emulator_cop1Handler()
2863 (get_user(instr[1], (u16 __user *)msk_isa16_mode(xcp->cp0_epc + 2))) || in fpu_emulator_cop1Handler()
2864 (get_user(instr[2], (u16 __user *)msk_isa16_mode(xcp->cp0_epc + 4))) || in fpu_emulator_cop1Handler()
2865 (get_user(instr[3], (u16 __user *)msk_isa16_mode(xcp->cp0_epc + 6)))) { in fpu_emulator_cop1Handler()
2902 (mips_instruction __user *) xcp->cp0_epc)) || in fpu_emulator_cop1Handler()
2904 (mips_instruction __user *)(xcp->cp0_epc+4)))) { in fpu_emulator_cop1Handler()
2916 xcp->cp0_epc += dec_insn.pc_inc; /* Skip NOPs */ in fpu_emulator_cop1Handler()
2922 sig = cop1Emulate(xcp, ctx, dec_insn, fault_addr); in fpu_emulator_cop1Handler()
2936 if ((xcp->cp0_epc ^ prevepc) & 0x1) in fpu_emulator_cop1Handler()
2940 } while (xcp->cp0_epc > prevepc); in fpu_emulator_cop1Handler()
2943 if (sig == SIGILL && xcp->cp0_epc != oldepc) in fpu_emulator_cop1Handler()