Lines Matching +full:1 +full:p
30 label_fpu_1 = 1,
73 if (pgd_reg != -1) in kvm_mips_entry_setup()
79 scratch_vcpu[1] = ffs(kscratch_mask) - 1; in kvm_mips_entry_setup()
80 kscratch_mask &= ~BIT(scratch_vcpu[1]); in kvm_mips_entry_setup()
86 scratch_tmp[1] = ffs(kscratch_mask) - 1; in kvm_mips_entry_setup()
87 kscratch_mask &= ~BIT(scratch_tmp[1]); in kvm_mips_entry_setup()
93 static void kvm_mips_build_save_scratch(u32 **p, unsigned int tmp, in kvm_mips_build_save_scratch() argument
97 UASM_i_MFC0(p, tmp, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_save_scratch()
98 UASM_i_SW(p, tmp, offsetof(struct pt_regs, cp0_epc), frame); in kvm_mips_build_save_scratch()
102 UASM_i_MFC0(p, tmp, scratch_tmp[0], scratch_tmp[1]); in kvm_mips_build_save_scratch()
103 UASM_i_SW(p, tmp, offsetof(struct pt_regs, cp0_cause), frame); in kvm_mips_build_save_scratch()
107 static void kvm_mips_build_restore_scratch(u32 **p, unsigned int tmp, in kvm_mips_build_restore_scratch() argument
114 UASM_i_LW(p, tmp, offsetof(struct pt_regs, cp0_epc), frame); in kvm_mips_build_restore_scratch()
115 UASM_i_MTC0(p, tmp, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_restore_scratch()
118 UASM_i_LW(p, tmp, offsetof(struct pt_regs, cp0_cause), frame); in kvm_mips_build_restore_scratch()
119 UASM_i_MTC0(p, tmp, scratch_tmp[0], scratch_tmp[1]); in kvm_mips_build_restore_scratch()
125 * @p: Code buffer pointer.
131 static inline void build_set_exc_base(u32 **p, unsigned int reg) in build_set_exc_base() argument
135 uasm_i_ori(p, reg, reg, MIPS_EBASE_WG); in build_set_exc_base()
136 UASM_i_MTC0(p, reg, C0_EBASE); in build_set_exc_base()
138 uasm_i_mtc0(p, reg, C0_EBASE); in build_set_exc_base()
158 u32 *p = addr; in kvm_mips_build_vcpu_run() local
166 UASM_i_ADDIU(&p, GPR_K1, GPR_SP, -(int)sizeof(struct pt_regs)); in kvm_mips_build_vcpu_run()
170 UASM_i_SW(&p, i, offsetof(struct pt_regs, regs[i]), GPR_K1); in kvm_mips_build_vcpu_run()
174 uasm_i_mfc0(&p, GPR_V0, C0_STATUS); in kvm_mips_build_vcpu_run()
175 UASM_i_SW(&p, GPR_V0, offsetof(struct pt_regs, cp0_status), GPR_K1); in kvm_mips_build_vcpu_run()
178 kvm_mips_build_save_scratch(&p, GPR_V1, GPR_K1); in kvm_mips_build_vcpu_run()
181 UASM_i_MTC0(&p, GPR_A0, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_vcpu_run()
184 UASM_i_ADDIU(&p, GPR_K1, GPR_A0, offsetof(struct kvm_vcpu, arch)); in kvm_mips_build_vcpu_run()
190 UASM_i_SW(&p, GPR_SP, offsetof(struct kvm_vcpu_arch, host_stack), GPR_K1); in kvm_mips_build_vcpu_run()
193 UASM_i_SW(&p, GPR_GP, offsetof(struct kvm_vcpu_arch, host_gp), GPR_K1); in kvm_mips_build_vcpu_run()
199 UASM_i_LA(&p, GPR_K0, ST0_EXL | KSU_USER | ST0_BEV | ST0_KX_IF_64); in kvm_mips_build_vcpu_run()
200 uasm_i_mtc0(&p, GPR_K0, C0_STATUS); in kvm_mips_build_vcpu_run()
201 uasm_i_ehb(&p); in kvm_mips_build_vcpu_run()
204 UASM_i_LW(&p, GPR_K0, offsetof(struct kvm_vcpu_arch, guest_ebase), GPR_K1); in kvm_mips_build_vcpu_run()
205 build_set_exc_base(&p, GPR_K0); in kvm_mips_build_vcpu_run()
212 uasm_i_addiu(&p, GPR_K0, GPR_ZERO, ST0_EXL | KSU_USER | ST0_IE | ST0_KX_IF_64); in kvm_mips_build_vcpu_run()
213 uasm_i_andi(&p, GPR_V0, GPR_V0, ST0_IM); in kvm_mips_build_vcpu_run()
214 uasm_i_or(&p, GPR_K0, GPR_K0, GPR_V0); in kvm_mips_build_vcpu_run()
215 uasm_i_mtc0(&p, GPR_K0, C0_STATUS); in kvm_mips_build_vcpu_run()
216 uasm_i_ehb(&p); in kvm_mips_build_vcpu_run()
218 p = kvm_mips_build_enter_guest(p); in kvm_mips_build_vcpu_run()
220 return p; in kvm_mips_build_vcpu_run()
235 u32 *p = addr; in kvm_mips_build_enter_guest() local
246 UASM_i_LW(&p, GPR_T0, offsetof(struct kvm_vcpu_arch, pc), GPR_K1); in kvm_mips_build_enter_guest()
247 UASM_i_MTC0(&p, GPR_T0, C0_EPC); in kvm_mips_build_enter_guest()
251 UASM_i_MFC0(&p, GPR_K0, C0_PWBASE); in kvm_mips_build_enter_guest()
253 UASM_i_MFC0(&p, GPR_K0, c0_kscratch(), pgd_reg); in kvm_mips_build_enter_guest()
254 UASM_i_SW(&p, GPR_K0, offsetof(struct kvm_vcpu_arch, host_pgd), GPR_K1); in kvm_mips_build_enter_guest()
264 UASM_i_LW(&p, GPR_S0, (int)offsetof(struct kvm_vcpu, kvm) - in kvm_mips_build_enter_guest()
266 UASM_i_LW(&p, GPR_A0, offsetof(struct kvm, arch.gpa_mm.pgd), GPR_S0); in kvm_mips_build_enter_guest()
267 UASM_i_LA(&p, GPR_T9, (unsigned long)tlbmiss_handler_setup_pgd); in kvm_mips_build_enter_guest()
268 uasm_i_jalr(&p, GPR_RA, GPR_T9); in kvm_mips_build_enter_guest()
271 UASM_i_MTC0(&p, GPR_A0, C0_PWBASE); in kvm_mips_build_enter_guest()
273 uasm_i_nop(&p); in kvm_mips_build_enter_guest()
276 uasm_i_addiu(&p, GPR_V1, GPR_ZERO, 1); in kvm_mips_build_enter_guest()
277 uasm_i_mfc0(&p, GPR_K0, C0_GUESTCTL0); in kvm_mips_build_enter_guest()
278 uasm_i_ins(&p, GPR_K0, GPR_V1, MIPS_GCTL0_GM_SHIFT, 1); in kvm_mips_build_enter_guest()
279 uasm_i_mtc0(&p, GPR_K0, C0_GUESTCTL0); in kvm_mips_build_enter_guest()
288 uasm_i_mfc0(&p, GPR_T0, C0_GUESTCTL1); in kvm_mips_build_enter_guest()
290 uasm_i_ext(&p, GPR_T1, GPR_T0, MIPS_GCTL1_ID_SHIFT, in kvm_mips_build_enter_guest()
292 uasm_i_ins(&p, GPR_T0, GPR_T1, MIPS_GCTL1_RID_SHIFT, in kvm_mips_build_enter_guest()
294 uasm_i_mtc0(&p, GPR_T0, C0_GUESTCTL1); in kvm_mips_build_enter_guest()
303 UASM_i_MFC0(&p, GPR_K0, C0_ENTRYHI); in kvm_mips_build_enter_guest()
304 UASM_i_SW(&p, GPR_K0, offsetof(struct kvm_vcpu_arch, host_entryhi), in kvm_mips_build_enter_guest()
308 UASM_i_ADDIU(&p, GPR_T1, GPR_S0, in kvm_mips_build_enter_guest()
313 uasm_i_lw(&p, GPR_T2, offsetof(struct thread_info, cpu), GPR_GP); in kvm_mips_build_enter_guest()
315 uasm_i_sll(&p, GPR_T2, GPR_T2, ilog2(sizeof(long))); in kvm_mips_build_enter_guest()
316 UASM_i_ADDU(&p, GPR_T3, GPR_T1, GPR_T2); in kvm_mips_build_enter_guest()
317 UASM_i_LW(&p, GPR_K0, 0, GPR_T3); in kvm_mips_build_enter_guest()
323 uasm_i_addiu(&p, GPR_T3, GPR_ZERO, sizeof(struct cpuinfo_mips)/sizeof(long)); in kvm_mips_build_enter_guest()
324 uasm_i_mul(&p, GPR_T2, GPR_T2, GPR_T3); in kvm_mips_build_enter_guest()
326 UASM_i_LA_mostly(&p, GPR_AT, (long)&cpu_data[0].asid_mask); in kvm_mips_build_enter_guest()
327 UASM_i_ADDU(&p, GPR_AT, GPR_AT, GPR_T2); in kvm_mips_build_enter_guest()
328 UASM_i_LW(&p, GPR_T2, uasm_rel_lo((long)&cpu_data[0].asid_mask), GPR_AT); in kvm_mips_build_enter_guest()
329 uasm_i_and(&p, GPR_K0, GPR_K0, GPR_T2); in kvm_mips_build_enter_guest()
331 uasm_i_andi(&p, GPR_K0, GPR_K0, MIPS_ENTRYHI_ASID); in kvm_mips_build_enter_guest()
335 uasm_i_mtc0(&p, GPR_K0, C0_ENTRYHI); in kvm_mips_build_enter_guest()
337 uasm_i_ehb(&p); in kvm_mips_build_enter_guest()
340 uasm_i_mtc0(&p, GPR_ZERO, C0_HWRENA); in kvm_mips_build_enter_guest()
343 for (i = 1; i < 32; ++i) { in kvm_mips_build_enter_guest()
347 UASM_i_LW(&p, i, offsetof(struct kvm_vcpu_arch, gprs[i]), GPR_K1); in kvm_mips_build_enter_guest()
352 UASM_i_LW(&p, GPR_K0, offsetof(struct kvm_vcpu_arch, hi), GPR_K1); in kvm_mips_build_enter_guest()
353 uasm_i_mthi(&p, GPR_K0); in kvm_mips_build_enter_guest()
355 UASM_i_LW(&p, GPR_K0, offsetof(struct kvm_vcpu_arch, lo), GPR_K1); in kvm_mips_build_enter_guest()
356 uasm_i_mtlo(&p, GPR_K0); in kvm_mips_build_enter_guest()
360 UASM_i_LW(&p, GPR_K0, offsetof(struct kvm_vcpu_arch, gprs[GPR_K0]), GPR_K1); in kvm_mips_build_enter_guest()
361 UASM_i_LW(&p, GPR_K1, offsetof(struct kvm_vcpu_arch, gprs[GPR_K1]), GPR_K1); in kvm_mips_build_enter_guest()
364 uasm_i_eret(&p); in kvm_mips_build_enter_guest()
368 return p; in kvm_mips_build_enter_guest()
382 u32 *p = addr; in kvm_mips_build_tlb_refill_exception() local
394 UASM_i_MTC0(&p, GPR_K1, scratch_tmp[0], scratch_tmp[1]); in kvm_mips_build_tlb_refill_exception()
397 UASM_i_MFC0(&p, GPR_K1, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_tlb_refill_exception()
400 UASM_i_SW(&p, GPR_K0, offsetof(struct kvm_vcpu, arch.gprs[GPR_K0]), GPR_K1); in kvm_mips_build_tlb_refill_exception()
409 UASM_i_MFC0(&p, GPR_K1, C0_PGD); in kvm_mips_build_tlb_refill_exception()
410 uasm_i_lddir(&p, GPR_K0, GPR_K1, 3); /* global page dir */ in kvm_mips_build_tlb_refill_exception()
412 uasm_i_lddir(&p, GPR_K1, GPR_K0, 1); /* middle page dir */ in kvm_mips_build_tlb_refill_exception()
414 uasm_i_ldpte(&p, GPR_K1, 0); /* even */ in kvm_mips_build_tlb_refill_exception()
415 uasm_i_ldpte(&p, GPR_K1, 1); /* odd */ in kvm_mips_build_tlb_refill_exception()
416 uasm_i_tlbwr(&p); in kvm_mips_build_tlb_refill_exception()
430 build_get_pmde64(&p, &l, &r, GPR_K0, GPR_K1); /* get pmd in GPR_K1 */ in kvm_mips_build_tlb_refill_exception()
432 build_get_pgde32(&p, GPR_K0, GPR_K1); /* get pgd in GPR_K1 */ in kvm_mips_build_tlb_refill_exception()
437 build_get_ptep(&p, GPR_K0, GPR_K1); in kvm_mips_build_tlb_refill_exception()
438 build_update_entries(&p, GPR_K0, GPR_K1); in kvm_mips_build_tlb_refill_exception()
439 build_tlb_write_entry(&p, &l, &r, tlb_random); in kvm_mips_build_tlb_refill_exception()
445 UASM_i_MFC0(&p, GPR_K1, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_tlb_refill_exception()
448 UASM_i_LW(&p, GPR_K0, offsetof(struct kvm_vcpu, arch.gprs[GPR_K0]), GPR_K1); in kvm_mips_build_tlb_refill_exception()
449 uasm_i_ehb(&p); in kvm_mips_build_tlb_refill_exception()
450 UASM_i_MFC0(&p, GPR_K1, scratch_tmp[0], scratch_tmp[1]); in kvm_mips_build_tlb_refill_exception()
453 uasm_i_eret(&p); in kvm_mips_build_tlb_refill_exception()
455 return p; in kvm_mips_build_tlb_refill_exception()
470 u32 *p = addr; in kvm_mips_build_exception() local
480 UASM_i_MTC0(&p, GPR_K1, scratch_tmp[0], scratch_tmp[1]); in kvm_mips_build_exception()
483 UASM_i_MFC0(&p, GPR_K1, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_exception()
484 UASM_i_ADDIU(&p, GPR_K1, GPR_K1, offsetof(struct kvm_vcpu, arch)); in kvm_mips_build_exception()
487 UASM_i_SW(&p, GPR_K0, offsetof(struct kvm_vcpu_arch, gprs[GPR_K0]), GPR_K1); in kvm_mips_build_exception()
490 uasm_il_b(&p, &r, label_exit_common); in kvm_mips_build_exception()
491 uasm_i_nop(&p); in kvm_mips_build_exception()
496 return p; in kvm_mips_build_exception()
512 u32 *p = addr; in kvm_mips_build_exit() local
537 UASM_i_SW(&p, i, offsetof(struct kvm_vcpu_arch, gprs[i]), GPR_K1); in kvm_mips_build_exit()
542 uasm_i_mfhi(&p, GPR_T0); in kvm_mips_build_exit()
543 UASM_i_SW(&p, GPR_T0, offsetof(struct kvm_vcpu_arch, hi), GPR_K1); in kvm_mips_build_exit()
545 uasm_i_mflo(&p, GPR_T0); in kvm_mips_build_exit()
546 UASM_i_SW(&p, GPR_T0, offsetof(struct kvm_vcpu_arch, lo), GPR_K1); in kvm_mips_build_exit()
550 uasm_i_ehb(&p); in kvm_mips_build_exit()
551 UASM_i_MFC0(&p, GPR_T0, scratch_tmp[0], scratch_tmp[1]); in kvm_mips_build_exit()
552 UASM_i_SW(&p, GPR_T0, offsetof(struct kvm_vcpu_arch, gprs[GPR_K1]), GPR_K1); in kvm_mips_build_exit()
557 UASM_i_MFC0(&p, GPR_S0, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_exit()
563 UASM_i_MFC0(&p, GPR_K0, C0_EPC); in kvm_mips_build_exit()
564 UASM_i_SW(&p, GPR_K0, offsetof(struct kvm_vcpu_arch, pc), GPR_K1); in kvm_mips_build_exit()
566 UASM_i_MFC0(&p, GPR_K0, C0_BADVADDR); in kvm_mips_build_exit()
567 UASM_i_SW(&p, GPR_K0, offsetof(struct kvm_vcpu_arch, host_cp0_badvaddr), in kvm_mips_build_exit()
570 uasm_i_mfc0(&p, GPR_K0, C0_CAUSE); in kvm_mips_build_exit()
571 uasm_i_sw(&p, GPR_K0, offsetof(struct kvm_vcpu_arch, host_cp0_cause), GPR_K1); in kvm_mips_build_exit()
574 uasm_i_mfc0(&p, GPR_K0, C0_BADINSTR); in kvm_mips_build_exit()
575 uasm_i_sw(&p, GPR_K0, offsetof(struct kvm_vcpu_arch, in kvm_mips_build_exit()
580 uasm_i_mfc0(&p, GPR_K0, C0_BADINSTRP); in kvm_mips_build_exit()
581 uasm_i_sw(&p, GPR_K0, offsetof(struct kvm_vcpu_arch, in kvm_mips_build_exit()
589 uasm_i_mfc0(&p, GPR_V0, C0_STATUS); in kvm_mips_build_exit()
591 uasm_i_lui(&p, GPR_AT, ST0_BEV >> 16); in kvm_mips_build_exit()
592 uasm_i_or(&p, GPR_K0, GPR_V0, GPR_AT); in kvm_mips_build_exit()
594 uasm_i_mtc0(&p, GPR_K0, C0_STATUS); in kvm_mips_build_exit()
595 uasm_i_ehb(&p); in kvm_mips_build_exit()
597 UASM_i_LA_mostly(&p, GPR_K0, (long)&ebase); in kvm_mips_build_exit()
598 UASM_i_LW(&p, GPR_K0, uasm_rel_lo((long)&ebase), GPR_K0); in kvm_mips_build_exit()
599 build_set_exc_base(&p, GPR_K0); in kvm_mips_build_exit()
606 uasm_i_lui(&p, GPR_AT, ST0_CU1 >> 16); in kvm_mips_build_exit()
607 uasm_i_and(&p, GPR_V1, GPR_V0, GPR_AT); in kvm_mips_build_exit()
608 uasm_il_beqz(&p, &r, GPR_V1, label_fpu_1); in kvm_mips_build_exit()
609 uasm_i_nop(&p); in kvm_mips_build_exit()
610 uasm_i_cfc1(&p, GPR_T0, 31); in kvm_mips_build_exit()
611 uasm_i_sw(&p, GPR_T0, offsetof(struct kvm_vcpu_arch, fpu.fcr31), in kvm_mips_build_exit()
613 uasm_i_ctc1(&p, GPR_ZERO, 31); in kvm_mips_build_exit()
614 uasm_l_fpu_1(&l, p); in kvm_mips_build_exit()
622 uasm_i_mfc0(&p, GPR_T0, C0_CONFIG5); in kvm_mips_build_exit()
623 uasm_i_ext(&p, GPR_T0, GPR_T0, 27, 1); /* MIPS_CONF5_MSAEN */ in kvm_mips_build_exit()
624 uasm_il_beqz(&p, &r, GPR_T0, label_msa_1); in kvm_mips_build_exit()
625 uasm_i_nop(&p); in kvm_mips_build_exit()
626 uasm_i_cfcmsa(&p, GPR_T0, MSA_CSR); in kvm_mips_build_exit()
627 uasm_i_sw(&p, GPR_T0, offsetof(struct kvm_vcpu_arch, fpu.msacsr), in kvm_mips_build_exit()
629 uasm_i_ctcmsa(&p, MSA_CSR, GPR_ZERO); in kvm_mips_build_exit()
630 uasm_l_msa_1(&l, p); in kvm_mips_build_exit()
635 UASM_i_LW(&p, GPR_K0, offsetof(struct kvm_vcpu_arch, host_entryhi), in kvm_mips_build_exit()
637 UASM_i_MTC0(&p, GPR_K0, C0_ENTRYHI); in kvm_mips_build_exit()
646 UASM_i_LW(&p, GPR_A0, in kvm_mips_build_exit()
648 UASM_i_LA(&p, GPR_T9, (unsigned long)tlbmiss_handler_setup_pgd); in kvm_mips_build_exit()
649 uasm_i_jalr(&p, GPR_RA, GPR_T9); in kvm_mips_build_exit()
652 UASM_i_MTC0(&p, GPR_A0, C0_PWBASE); in kvm_mips_build_exit()
654 uasm_i_nop(&p); in kvm_mips_build_exit()
657 uasm_i_mfc0(&p, GPR_K0, C0_GUESTCTL0); in kvm_mips_build_exit()
658 uasm_i_ins(&p, GPR_K0, GPR_ZERO, MIPS_GCTL0_GM_SHIFT, 1); in kvm_mips_build_exit()
659 uasm_i_mtc0(&p, GPR_K0, C0_GUESTCTL0); in kvm_mips_build_exit()
662 uasm_i_sw(&p, GPR_K0, in kvm_mips_build_exit()
670 uasm_i_mfc0(&p, GPR_T0, C0_GUESTCTL1); in kvm_mips_build_exit()
672 uasm_i_ins(&p, GPR_T0, GPR_ZERO, MIPS_GCTL1_RID_SHIFT, in kvm_mips_build_exit()
674 uasm_i_mtc0(&p, GPR_T0, C0_GUESTCTL1); in kvm_mips_build_exit()
678 uasm_i_addiu(&p, GPR_AT, GPR_ZERO, ~(ST0_EXL | KSU_USER | ST0_IE)); in kvm_mips_build_exit()
679 uasm_i_and(&p, GPR_V0, GPR_V0, GPR_AT); in kvm_mips_build_exit()
680 uasm_i_lui(&p, GPR_AT, ST0_CU0 >> 16); in kvm_mips_build_exit()
681 uasm_i_or(&p, GPR_V0, GPR_V0, GPR_AT); in kvm_mips_build_exit()
683 uasm_i_ori(&p, GPR_V0, GPR_V0, ST0_SX | ST0_UX); in kvm_mips_build_exit()
685 uasm_i_mtc0(&p, GPR_V0, C0_STATUS); in kvm_mips_build_exit()
686 uasm_i_ehb(&p); in kvm_mips_build_exit()
689 UASM_i_LW(&p, GPR_GP, offsetof(struct kvm_vcpu_arch, host_gp), GPR_K1); in kvm_mips_build_exit()
692 UASM_i_LW(&p, GPR_SP, offsetof(struct kvm_vcpu_arch, host_stack), GPR_K1); in kvm_mips_build_exit()
695 UASM_i_ADDIU(&p, GPR_SP, GPR_SP, -(int)sizeof(struct pt_regs)); in kvm_mips_build_exit()
703 kvm_mips_build_restore_scratch(&p, GPR_K0, GPR_SP); in kvm_mips_build_exit()
706 UASM_i_LA_mostly(&p, GPR_K0, (long)&hwrena); in kvm_mips_build_exit()
707 uasm_i_lw(&p, GPR_K0, uasm_rel_lo((long)&hwrena), GPR_K0); in kvm_mips_build_exit()
708 uasm_i_mtc0(&p, GPR_K0, C0_HWRENA); in kvm_mips_build_exit()
716 uasm_i_move(&p, GPR_A0, GPR_S0); in kvm_mips_build_exit()
717 UASM_i_LA(&p, GPR_T9, (unsigned long)kvm_mips_handle_exit); in kvm_mips_build_exit()
718 uasm_i_jalr(&p, GPR_RA, GPR_T9); in kvm_mips_build_exit()
719 UASM_i_ADDIU(&p, GPR_SP, GPR_SP, -CALLFRAME_SIZ); in kvm_mips_build_exit()
723 p = kvm_mips_build_ret_from_exit(p); in kvm_mips_build_exit()
725 return p; in kvm_mips_build_exit()
739 u32 *p = addr; in kvm_mips_build_ret_from_exit() local
749 uasm_i_di(&p, GPR_ZERO); in kvm_mips_build_ret_from_exit()
750 uasm_i_ehb(&p); in kvm_mips_build_ret_from_exit()
758 uasm_i_move(&p, GPR_K1, GPR_S0); in kvm_mips_build_ret_from_exit()
759 UASM_i_ADDIU(&p, GPR_K1, GPR_K1, offsetof(struct kvm_vcpu, arch)); in kvm_mips_build_ret_from_exit()
765 uasm_i_andi(&p, GPR_T0, GPR_V0, RESUME_HOST); in kvm_mips_build_ret_from_exit()
766 uasm_il_bnez(&p, &r, GPR_T0, label_return_to_host); in kvm_mips_build_ret_from_exit()
767 uasm_i_nop(&p); in kvm_mips_build_ret_from_exit()
769 p = kvm_mips_build_ret_to_guest(p); in kvm_mips_build_ret_from_exit()
771 uasm_l_return_to_host(&l, p); in kvm_mips_build_ret_from_exit()
772 p = kvm_mips_build_ret_to_host(p); in kvm_mips_build_ret_from_exit()
776 return p; in kvm_mips_build_ret_from_exit()
790 u32 *p = addr; in kvm_mips_build_ret_to_guest() local
793 UASM_i_MTC0(&p, GPR_S0, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_ret_to_guest()
796 UASM_i_LW(&p, GPR_T0, offsetof(struct kvm_vcpu_arch, guest_ebase), GPR_K1); in kvm_mips_build_ret_to_guest()
799 uasm_i_mfc0(&p, GPR_V1, C0_STATUS); in kvm_mips_build_ret_to_guest()
800 uasm_i_lui(&p, GPR_AT, ST0_BEV >> 16); in kvm_mips_build_ret_to_guest()
801 uasm_i_or(&p, GPR_K0, GPR_V1, GPR_AT); in kvm_mips_build_ret_to_guest()
802 uasm_i_mtc0(&p, GPR_K0, C0_STATUS); in kvm_mips_build_ret_to_guest()
803 uasm_i_ehb(&p); in kvm_mips_build_ret_to_guest()
804 build_set_exc_base(&p, GPR_T0); in kvm_mips_build_ret_to_guest()
807 uasm_i_ori(&p, GPR_V1, GPR_V1, ST0_EXL | KSU_USER | ST0_IE); in kvm_mips_build_ret_to_guest()
808 UASM_i_LA(&p, GPR_AT, ~(ST0_CU0 | ST0_MX | ST0_SX | ST0_UX)); in kvm_mips_build_ret_to_guest()
809 uasm_i_and(&p, GPR_V1, GPR_V1, GPR_AT); in kvm_mips_build_ret_to_guest()
810 uasm_i_mtc0(&p, GPR_V1, C0_STATUS); in kvm_mips_build_ret_to_guest()
811 uasm_i_ehb(&p); in kvm_mips_build_ret_to_guest()
813 p = kvm_mips_build_enter_guest(p); in kvm_mips_build_ret_to_guest()
815 return p; in kvm_mips_build_ret_to_guest()
830 u32 *p = addr; in kvm_mips_build_ret_to_host() local
834 UASM_i_LW(&p, GPR_K1, offsetof(struct kvm_vcpu_arch, host_stack), GPR_K1); in kvm_mips_build_ret_to_host()
835 UASM_i_ADDIU(&p, GPR_K1, GPR_K1, -(int)sizeof(struct pt_regs)); in kvm_mips_build_ret_to_host()
841 uasm_i_sra(&p, GPR_K0, GPR_V0, 2); in kvm_mips_build_ret_to_host()
842 uasm_i_move(&p, GPR_V0, GPR_K0); in kvm_mips_build_ret_to_host()
848 UASM_i_LW(&p, i, offsetof(struct pt_regs, regs[i]), GPR_K1); in kvm_mips_build_ret_to_host()
852 UASM_i_LA_mostly(&p, GPR_K0, (long)&hwrena); in kvm_mips_build_ret_to_host()
853 uasm_i_lw(&p, GPR_K0, uasm_rel_lo((long)&hwrena), GPR_K0); in kvm_mips_build_ret_to_host()
854 uasm_i_mtc0(&p, GPR_K0, C0_HWRENA); in kvm_mips_build_ret_to_host()
857 UASM_i_LW(&p, GPR_RA, offsetof(struct pt_regs, regs[GPR_RA]), GPR_K1); in kvm_mips_build_ret_to_host()
858 uasm_i_jr(&p, GPR_RA); in kvm_mips_build_ret_to_host()
859 uasm_i_nop(&p); in kvm_mips_build_ret_to_host()
861 return p; in kvm_mips_build_ret_to_host()