Lines Matching refs:_SB_MAKEMASK
32 #define M_SYS_RESERVED _SB_MAKEMASK(8, 0)
35 #define M_SYS_REVISION _SB_MAKEMASK(8, S_SYS_REVISION)
84 #define M_SYS_L2C_SIZE _SB_MAKEMASK(4, S_SYS_L2C_SIZE)
100 #define M_SYS_NUM_CPUS _SB_MAKEMASK(4, S_SYS_NUM_CPUS)
107 #define M_SYS_PART _SB_MAKEMASK(16, S_SYS_PART)
121 #define M_SYS_SOC_TYPE _SB_MAKEMASK(4, S_SYS_SOC_TYPE)
160 #define M_SYS_WID _SB_MAKEMASK(32, S_SYS_WID)
172 #define M_SYS_WAFERID1_200 _SB_MAKEMASK(32, S_SYS_WAFERID1_200)
177 #define M_SYS_BIN _SB_MAKEMASK(4, S_SYS_BIN)
183 #define M_SYS_WAFERID2_200 _SB_MAKEMASK(4, S_SYS_WAFERID2_200)
189 #define M_SYS_WAFERID_300 _SB_MAKEMASK(40, S_SYS_WAFERID_300)
194 #define M_SYS_XPOS _SB_MAKEMASK(6, S_SYS_XPOS)
199 #define M_SYS_YPOS _SB_MAKEMASK(6, S_SYS_YPOS)
217 #define M_SYS_PLL_DIV _SB_MAKEMASK(5, S_SYS_PLL_DIV)
228 #define M_SYS_BOOT_MODE _SB_MAKEMASK(2, S_SYS_BOOT_MODE)
245 #define M_SYS_CONFIG _SB_MAKEMASK(6, S_SYS_CONFIG)
255 #define M_SYS_CLKCOUNT _SB_MAKEMASK(8, S_SYS_CLKCOUNT)
262 #define M_SYS_PLL_IREF _SB_MAKEMASK(2, S_SYS_PLL_IREF)
265 #define M_SYS_PLL_VCO _SB_MAKEMASK(2, S_SYS_PLL_VCO)
268 #define M_SYS_PLL_VREG _SB_MAKEMASK(2, S_SYS_PLL_VREG)
304 #define M_MBOX_INT_3 _SB_MAKEMASK(16, S_MBOX_INT_3)
306 #define M_MBOX_INT_2 _SB_MAKEMASK(16, S_MBOX_INT_2)
308 #define M_MBOX_INT_1 _SB_MAKEMASK(16, S_MBOX_INT_1)
310 #define M_MBOX_INT_0 _SB_MAKEMASK(16, S_MBOX_INT_0)
320 #define M_SCD_WDOG_INIT _SB_MAKEMASK(23, S_SCD_WDOG_INIT)
323 #define M_SCD_WDOG_CNT _SB_MAKEMASK(23, S_SCD_WDOG_CNT)
329 #define M_SCD_WDOG_RESET_TYPE _SB_MAKEMASK(3, S_SCD_WDOG_RESET_TYPE)
353 #define M_SCD_TIMER_INIT _SB_MAKEMASK(23, S_SCD_TIMER_INIT)
359 #define M_SCD_TIMER_CNT _SB_MAKEMASK(V_SCD_TIMER_WIDTH, S_SCD_TIMER_CNT)
372 #define M_SPC_CFG_SRC0 _SB_MAKEMASK(8, S_SPC_CFG_SRC0)
377 #define M_SPC_CFG_SRC1 _SB_MAKEMASK(8, S_SPC_CFG_SRC1)
382 #define M_SPC_CFG_SRC2 _SB_MAKEMASK(8, S_SPC_CFG_SRC2)
387 #define M_SPC_CFG_SRC3 _SB_MAKEMASK(8, S_SPC_CFG_SRC3)
402 #define M_SCD_BERR_TID _SB_MAKEMASK(10, S_SCD_BERR_TID)
407 #define M_SCD_BERR_RID _SB_MAKEMASK(4, S_SCD_BERR_RID)
412 #define M_SCD_BERR_DCODE _SB_MAKEMASK(3, S_SCD_BERR_DCODE)
420 #define M_SCD_L2ECC_CORR_D _SB_MAKEMASK(8, S_SCD_L2ECC_CORR_D)
425 #define M_SCD_L2ECC_BAD_D _SB_MAKEMASK(8, S_SCD_L2ECC_BAD_D)
430 #define M_SCD_L2ECC_CORR_T _SB_MAKEMASK(8, S_SCD_L2ECC_CORR_T)
435 #define M_SCD_L2ECC_BAD_T _SB_MAKEMASK(8, S_SCD_L2ECC_BAD_T)
440 #define M_SCD_MEM_ECC_CORR _SB_MAKEMASK(8, S_SCD_MEM_ECC_CORR)
445 #define M_SCD_MEM_ECC_BAD _SB_MAKEMASK(8, S_SCD_MEM_ECC_BAD)
450 #define M_SCD_MEM_BUSERR _SB_MAKEMASK(8, S_SCD_MEM_BUSERR)
460 #define M_ATRAP_INDEX _SB_MAKEMASK(4, 0)
461 #define M_ATRAP_ADDRESS _SB_MAKEMASK(40, 0)
464 #define M_ATRAP_CFG_CNT _SB_MAKEMASK(3, S_ATRAP_CFG_CNT)
475 #define M_ATRAP_CFG_AGENTID _SB_MAKEMASK(4, S_ATRAP_CFG_AGENTID)
488 #define M_ATRAP_CFG_CATTR _SB_MAKEMASK(3, S_ATRAP_CFG_CATTR)
531 #define M_SCD_TRACE_CFG_CUR_ADDR _SB_MAKEMASK(8, S_SCD_TRACE_CFG_CUR_ADDR)
540 #define M_SCD_TREVT_ADDR_MATCH _SB_MAKEMASK(4, S_SCD_TREVT_ADDR_MATCH)
553 #define M_SCD_TREVT_REQID _SB_MAKEMASK(4, S_SCD_TREVT_REQID)
558 #define M_SCD_TREVT_RESPID _SB_MAKEMASK(4, S_SCD_TREVT_RESPID)
563 #define M_SCD_TREVT_DATAID _SB_MAKEMASK(4, S_SCD_TREVT_DATAID)
568 #define M_SCD_TREVT_COUNT _SB_MAKEMASK(8, S_SCD_TREVT_COUNT)
577 #define M_SCD_TRSEQ_EVENT4 _SB_MAKEMASK(4, S_SCD_TRSEQ_EVENT4)
582 #define M_SCD_TRSEQ_EVENT3 _SB_MAKEMASK(4, S_SCD_TRSEQ_EVENT3)
587 #define M_SCD_TRSEQ_EVENT2 _SB_MAKEMASK(4, S_SCD_TRSEQ_EVENT2)
592 #define M_SCD_TRSEQ_EVENT1 _SB_MAKEMASK(4, S_SCD_TRSEQ_EVENT1)
619 #define M_SCD_TRSEQ_FUNCTION _SB_MAKEMASK(4, S_SCD_TRSEQ_FUNCTION)