Lines Matching +full:32 +full:- +full:61

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
33 * Ethernet and Serial DMA Configuration Register 0 (Table 7-4)
75 #define S_DMA_HIGH_WATERMARK _SB_MAKE64(32)
86 * Ethernet and Serial DMA Configuration Register 1 (Table 7-5)
113 #define M_DMA_MBZ2 _SB_MAKEMASK(5, 32)
126 * Ethernet and Serial DMA Descriptor base address (Table 7-6)
133 * ASIC Mode Base Address (Table 7-7)
139 * DMA Descriptor Count Registers (Table 7-8)
146 * Current Descriptor Address Register (Table 7-11)
176 * Descriptor doubleword "A" (Table 7-12)
215 * Descriptor doubleword "B" (Table 7-13)
265 * Ethernet Descriptor Status Bits (Table 7-15)
304 #define M_DMA_ETHRX_MCAST _SB_MAKEMASK1(61)
309 * Ethernet Transmit Status Bits (Table 7-16)
315 * Ethernet Transmit Options (Table 7-17)
336 * Serial Receive Options (Table 7-18)
343 #define M_DMA_SERRX_OVERRUN_ERROR _SB_MAKEMASK1(61)
348 * Serial Transmit Status Bits (Table 7-20)
354 * Serial Transmit Options (Table 7-21)
368 * Data Mover Descriptor Base Address Register (Table 7-22)
399 #define M_DM_DSCR_BASE_RESET _SB_MAKEMASK1(61) /* write register */
400 #define M_DM_DSCR_BASE_ERROR _SB_MAKEMASK1(61) /* read register */
405 * Data Mover Descriptor Count Register (Table 7-25)
411 * Data Mover Current Descriptor Address (Table 7-24)
437 #define M_DM_PARTIAL_CRC_PARTIAL _SB_MAKEMASK(32, S_DM_PARTIAL_CRC_PARTIAL)
442 #define S_DM_PARTIAL_TCPCS_PARTIAL _SB_MAKE64(32)
459 #define M_CRC_DEF_CRC_INIT _SB_MAKEMASK(32, S_CRC_DEF_CRC_INIT)
464 #define S_CRC_DEF_CRC_POLY _SB_MAKE64(32)
465 #define M_CRC_DEF_CRC_POLY _SB_MAKEMASK(32, S_CRC_DEF_CRC_POLY)
479 #define M_CTCP_DEF_CRC_TXOR _SB_MAKEMASK(32, S_CTCP_DEF_CRC_TXOR)
484 #define S_CTCP_DEF_TCPCS_INIT _SB_MAKE64(32)
505 * Data Mover Descriptor Doubleword "A" (Table 7-26)
563 #define M_DM_DSCRA_CRC_XBIT _SB_MAKEMASK1(61)
566 #define M_DM_DSCRA_RESERVED2 _SB_MAKEMASK(3, 61)
569 * Data Mover Descriptor Doubleword "B" (Table 7-25)