asm/sgi/mc.h

18 	volatile u32 cpuctrl0;	/* CPU control register 0, readwrite */
39 	volatile u32 cpuctrl1;	/* CPU control register 1, readwrite */
49 	volatile u32 watchdogt; /* Watchdog reg rdonly, write clears */
52 	volatile u32 systemid;	/* MC system ID register, readonly */
57 	volatile u32 divider;	/* Divider reg for RPSS */
68 	volatile u32 rcntpre;	/* Preload refresh counter */
71 	volatile u32 rcounter;	/* Readonly refresh counter */
74 	volatile u32 giopar;	/* Parameter word for GIO64 */
93 	volatile u32 cputp;	/* CPU bus arb time period */
96 	volatile u32 lbursttp;	/* Time period for long bursts */
101 	volatile u32 mconfig0;	/* Memory config register zero */
103 	volatile u32 mconfig1;	/* Memory config register one */
110 	volatile u32 cmacc;	   /* Mem access config for CPU */
112 	volatile u32 gmacc;	   /* Mem access config for GIO */
119 	volatile u32 cerr;	/* Error address reg for CPU */
121 	volatile u32 cstat;	/* Status reg for CPU */
132 	volatile u32 gerr;	/* Error address reg for GIO */
134 	volatile u32 gstat;	/* Status reg for GIO */
146 	volatile u32 syssembit;		/* Uni-bit system semaphore */
148 	volatile u32 mlock;		/* Global GIO memory access lock */
150 	volatile u32 elock;		/* Locks EISA from GIO accesses */
154 	volatile u32 gio_dma_trans;	/* DMA mask to translation GIO addrs */
156 	volatile u32 gio_dma_sbits;	/* DMA GIO addr substitution bits */
158 	volatile u32 dma_intr_cause;	/* DMA IRQ cause indicator bits */
160 	volatile u32 dma_ctrl;		/* Main DMA control reg */
164 	volatile u32 dtlb_hi0;
166 	volatile u32 dtlb_lo0;
170 	volatile u32 dtlb_hi1;
172 	volatile u32 dtlb_lo1;
176 	volatile u32 dtlb_hi2;
178 	volatile u32 dtlb_lo2;
182 	volatile u32 dtlb_hi3;
184 	volatile u32 dtlb_lo3;
189 	volatile u32 rpsscounter;	/* Chirps at 100ns */
194 	volatile u32 maddronly;		/* Address DMA goes at */
196 	volatile u32 maddrpdeflts;	/* Same as above, plus set defaults */
198 	volatile u32 dmasz;		/* DMA count */
200 	volatile u32 ssize;		/* DMA stride size */
202 	volatile u32 gmaddronly;	/* Set GIO DMA but don't start trans */
204 	volatile u32 dmaddnpgo;		/* Set GIO DMA addr + start transfer */
206 	volatile u32 dmamode;		/* DMA mode config bit settings */
208 	volatile u32 dmaccount;		/* Zoom and byte count for DMA */
210 	volatile u32 dmastart;		/* Pedal to the metal. */
212 	volatile u32 dmarunning;	/* DMA op is in progress */
214 	volatile u32 maddrdefstart;	/* Set dma addr, defaults, and kick it */