include/asm/pgtable-64.h

21 #include <asm-generic/pgtable-nopmd.h>
23 #include <asm-generic/pgtable-nopud.h>
25 #include <asm-generic/pgtable-nop4d.h>
30  * (== PTRS_PER_PGD) 8 byte pointers to pmd tables. Each pmd table is a
32  * tables. Each page table is also a single 4K page, giving 512 (==
39  * fault address - VMALLOC_START.
43 /* PGDIR_SHIFT determines what a third-level page table entry can map */
45 #define PGDIR_SHIFT	(PAGE_SHIFT + PAGE_SHIFT - 3)
48 /* PMD_SHIFT determines the size of the area a second-level page table can map */
49 #define PMD_SHIFT	(PAGE_SHIFT + (PAGE_SHIFT - 3))
50 #define PMD_SIZE	(1UL << PMD_SHIFT)
51 #define PMD_MASK	(~(PMD_SIZE-1))
54 # define PGDIR_SHIFT	(PMD_SHIFT + (PAGE_SHIFT + PMD_TABLE_ORDER - 3))
59 #define PUD_SHIFT	(PMD_SHIFT + (PAGE_SHIFT + PMD_TABLE_ORDER - 3))
60 #define PUD_SIZE	(1UL << PUD_SHIFT)
61 #define PUD_MASK	(~(PUD_SIZE-1))
62 #define PGDIR_SHIFT	(PUD_SHIFT + (PAGE_SHIFT + PUD_TABLE_ORDER - 3))
65 #define PGDIR_SIZE	(1UL << PGDIR_SHIFT)
66 #define PGDIR_MASK	(~(PGDIR_SIZE-1))
69  * For 4kB page size we use a 3 level page tree and an 8kB pud, which
72  * We used to implement 41 bits by having an order 1 pmd level but that seemed
75  * For 8kB page size we use a 3 level page tree which permits a total of
76  * 8TB of address space.  Alternatively a 33-bit / 8GB organization using
79  * For 16kB page size we use a 2 level page tree which permits a total of
80  * 36 bits of virtual address space.  We could add a third level but it seems
83  * For 64kB page size we use a 2 level page table tree for a total of 42 bits
91 #  define PGD_TABLE_ORDER	1
103 #define PGD_TABLE_ORDER		1
134 #define USER_PTRS_PER_PGD       ((TASK_SIZE64 / PGDIR_SIZE)?(TASK_SIZE64 / PGDIR_SIZE):1)
145 	     (1UL << cpu_vmbits)) - (1UL << 32))
149 /* Load modules into 32bit-compatible segment. */
151 #define MODULES_END	(FIXADDR_START-2*PAGE_SIZE)
154 #define pte_ERROR(e) \  argument
155 	printk("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e))
157 #define pmd_ERROR(e) \  argument
158 	printk("%s:%d: bad pmd %016lx.\n", __FILE__, __LINE__, pmd_val(e))
161 #define pud_ERROR(e) \  argument
162 	printk("%s:%d: bad pud %016lx.\n", __FILE__, __LINE__, pud_val(e))
164 #define pgd_ERROR(e) \  argument
165 	printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e))
171  * For 4-level pagetables we defines these ourselves, for 3-level the
172  * definitions are below, for 2-level the
173  * definitions are supplied by <asm-generic/pgtable-nopmd.h>.
192 		return 1;  in p4d_bad()
215 #define p4d_index(address)	(((address) >> P4D_SHIFT) & (PTRS_PER_P4D - 1))
226  * For 3-level pagetables we defines these ourselves, for 2-level the
227  * definitions are supplied by <asm-generic/pgtable-nopmd.h>.
254 		return 1;  in pmd_bad()
316  * Initialize a new pgd / pud / pmd table with invalid pointers.
329  *   3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2
330  *   <--------------------------- offset ---------------------------
332  *   3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
333  *   1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
334  *   --------------> E <-- type ---> <---------- zeroes ----------->
336  *  E is the exclusive marker that is not stored in swap entries.
348 #define _PAGE_SWP_EXCLUSIVE	(1 << 23)