asm/octeon/cvmx.h

7  * Copyright (c) 2003-2017 Cavium, Inc.
14  * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
21  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
42 /* These macros for use when using 32 bit pointers. */
56 #include <asm/octeon/cvmx-asm.h>
57 #include <asm/octeon/cvmx-packet.h>
58 #include <asm/octeon/cvmx-sysinfo.h>
60 #include <asm/octeon/cvmx-ciu-defs.h>
61 #include <asm/octeon/cvmx-ciu3-defs.h>
62 #include <asm/octeon/cvmx-gpio-defs.h>
63 #include <asm/octeon/cvmx-iob-defs.h>
64 #include <asm/octeon/cvmx-ipd-defs.h>
65 #include <asm/octeon/cvmx-l2c-defs.h>
66 #include <asm/octeon/cvmx-l2d-defs.h>
67 #include <asm/octeon/cvmx-l2t-defs.h>
68 #include <asm/octeon/cvmx-led-defs.h>
69 #include <asm/octeon/cvmx-mio-defs.h>
70 #include <asm/octeon/cvmx-pow-defs.h>
72 #include <asm/octeon/cvmx-bootinfo.h>
73 #include <asm/octeon/cvmx-bootmem.h>
74 #include <asm/octeon/cvmx-l2c.h>
88 #define CVMX_CACHE_LINE_MASK	(CVMX_CACHE_LINE_SIZE - 1)	/* In bytes */
95  * provided in the cvmx-app-init*.c files.
110  * Builds a bit mask given the required size in bits.
122  * @major_did: 5 bit major did
123  * @sub_did:   3 bit sub did
129 	return (0x1ull << 48) | (major_did << 43) | (sub_did << 40);  in cvmx_build_io_address()
134  * the supplied bit rage.
140  * +-------+-------+-------+-------+-------+-------+-------+------+
144  * @high_bit: Highest bit value can occupy (inclusive) 0-63
145  * @low_bit:  Lowest bit value can occupy inclusive 0-high_bit
152 	return (value & cvmx_build_mask(high_bit - low_bit + 1)) << low_bit;  in cvmx_build_bits()
167 		 * We're running in 64 bit mode. Normally this means  in cvmx_ptr_to_phys()
168 		 * that we can use 40 bits of address space (the  in cvmx_ptr_to_phys()
171 		 * extended 32 bit. Although these are 64 bits wide,  in cvmx_ptr_to_phys()
177 			return CAST64(ptr) & cvmx_build_mask(40);  in cvmx_ptr_to_phys()
194 		/* Just set the top bit, avoiding any TLB ugliness */  in cvmx_phys_to_ptr()
207     a full 64bit address. With a 64bit ABI, this can be done with a simple
208     pointer access. 32bit ABIs require more complicated assembly */
210 /* We have a full 64bit ABI. Writing to a 64bit address can be done with
221     a full 64bit address. With a 64bit ABI, this can be done with a simple
222     pointer access. 32bit ABIs require more complicated assembly */
224 /* We have a full 64bit ABI. Writing to a 64bit address can be done with
233 /* The following defines 8 functions for writing to a 64bit address. Each
249 /* The following defines 8 functions for reading from a 64bit address. Each
276 	if (((csr_addr >> 40) & 0x7ffff) == (0x118))  in cvmx_write_csr()
358 	return cvmx_get_core_num() & ((1 << CVMX_NODE_NO_SHIFT) - 1);  in cvmx_get_local_core_num()
364 #define CVMX_NODE_MEM_SHIFT    (40)
376 	if (((csr_addr >> 40) & 0x7ffff) == (0x118))  in cvmx_write_csr_node()
393  * @val:    32 bit value to count set bits in
408  * @val:    64 bit value to count set bits in
434  * chip reset.	The counter is 64 bit.
462 			cvmx_sysinfo_get()->cpu_clock_hz / 1000000;	\
470 				result = -1;				\