7  * Copyright (c) 2003-2008 Cavium Networks
14  * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
21  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
31  * New, starting with SDK 1.7.0, cvmx-pow supports a number of
36  * enabled. For example, cvmx-pow will check for the following
38  * - Requesting a POW operation with an active tag switch in
40  * - Waiting for a tag switch to complete for an excessively
43  * - Illegal tag switches from NULL_NULL.
44  * - Illegal tag switches from NULL.
45  * - Illegal deschedule request.
46  * - WQE pointer not matching the one attached to the core by
54 #include <asm/octeon/cvmx-pow-defs.h>
56 #include <asm/octeon/cvmx-scratch.h>
57 #include <asm/octeon/cvmx-wqe.h>
70 	 * The work queue entry from the order - NEVER tag switch from
75 	 * - NEVER tag switch to NULL_NULL
76 	 * - NEVER tag switch from NULL_NULL
77 	 * - NULL_NULL is entered at the beginning of time and on a deschedule.
78 	 * - NULL_NULL can be exited by a new work request. A NULL_SWITCH
98 	 * - the previous tag should be non-NULL in this case
99 	 * - tag switch response required
100 	 * - fields used: op, type, tag
105 	 * - this should be used when the previous tag is NULL
106 	 * - tag switch response required
107 	 * - fields used: address, op, grp, type, tag
111 	 * switch the tag (and/or group) for this PP and de-schedule
112 	 * - OK to keep the tag the same and only change the group
113 	 * - fields used: op, no_sched, grp, type, tag
117 	 * just de-schedule
118 	 * - fields used: op, no_sched
123 	 * - fields used: address, op, qos, grp, type, tag
128 	 * - fields used: address, op, grp
132 	 * set the no_sched bit on the de-schedule list
134 	 * - does nothing if the selected entry is not on the
135 	 *   de-schedule list
137 	 * - does nothing if the stored work queue pointer does not
140 	 * - fields used: address, index, op
152 	 * clears the no_sched bit on the de-schedule list
154 	 * - does nothing if the selected entry is not on the
155 	 *   de-schedule list
157 	 * - does nothing if the stored work queue pointer does not
160 	 * - fields used: address, index, op
189 		/* Tontains index of entry for a CVMX_POW_TAG_OP_*_NSCHED */
190 		uint64_t index:13;  member
200 		 * The group that the work queue entry will be
228 		uint64_t index:13;
252 		/* the ID of POW -- did<2:0> == 0 in this case */
285 		/* the ID of POW -- did<2:0> == 1 in this case */
292 		 * If set and get_cur is set, return reverse tag-list
293 		 * pointer rather than forward tag-list pointer.
302 		 * If set, get the work-queue pointer rather than
333 		/* the ID of POW -- did<2:0> == 2 in this case */
337 		/* POW memory index */
338 		uint64_t index:11;  member
341 		 * the standard response for work-queue index (invalid
342 		 * if the work-queue entry is not on the deschedule
347 		 * If set, get the work-queue pointer rather than
357 		uint64_t index:11;
367      * Address for index/pointer loads
377 		/* the ID of POW -- did<2:0> == 3 in this case */
383 		 * field selects one of eight POW internal-input
384 		 * queues (0-7), one per QOS level; values 8-15 are
387 		 * 16 deschedule lists (per group); when get_rmt ==1,
388 		 * this field selects one of 16 memory-input queue
389 		 * lists.  The two memory-input queue lists associated
392 		 * - qosgrp = 0, qosgrp = 8:	  QOS0
393 		 * - qosgrp = 1, qosgrp = 9:	  QOS1
394 		 * - qosgrp = 2, qosgrp = 10:	  QOS2
395 		 * - qosgrp = 3, qosgrp = 11:	  QOS3
396 		 * - qosgrp = 4, qosgrp = 12:	  QOS4
397 		 * - qosgrp = 5, qosgrp = 13:	  QOS5
398 		 * - qosgrp = 6, qosgrp = 14:	  QOS6
399 		 * - qosgrp = 7, qosgrp = 15:	  QOS7
434      * not available - software may need to recover by finishing
446 		/* the ID of POW -- did<2:0> == 4 in this case */
474 		 * If there was de-scheduled work, the HW will
478 		 * - There was no work, or
480 		 * - There was no work that the HW could find. This
488 		/* 36 in O1 -- the work queue pointer */
503 		/* Set when there is a pending non-NULL SWTAG or
535 		/* This is the index when pend_nosched_clr is set. */
549 		 * - this is the tag when pend_switch or (pend_desched
581 		 * Set when there is a pending non-NULL SWTAG or
617 		/* This is the index when pend_nosched_clr is set. */
658 		uint64_t index:11;  member
660 		 * The group attached to the core (updated when new
694 	        uint64_t index:11;
714 		uint64_t index:11;  member
716 		 * The group attached to the core (updated when new
749 	        uint64_t index:11;
768 		uint64_t index:11;  member
770 		 * The group attached to the core (updated when new
782 	        uint64_t index:11;
803 		uint64_t index:11;  member
805 		 * The group attached to the core (updated when new
817 	        uint64_t index:11;
835 		/* The group of the POW entry. */
871 		/* The group of the POW entry. */
894 		/* The group of the POW entry. */
922      * Result For POW Index/Pointer Load (get_rmt == 0/get_des_get_tail == 0)
989      * Result For POW Index/Pointer Load (get_rmt == 0/get_des_get_tail == 1)
1057      * Result For POW Index/Pointer Load (get_rmt == 1/get_des_get_tail == 0)
1099      * Result For POW Index/Pointer Load (get_rmt ==
1150 		 * - CVMX_POW_TAG_TYPE_ORDERED
1151 		 * - CVMX_POW_TAG_TYPE_ATOMIC
1152 		 * - CVMX_POW_TAG_TYPE_NULL
1153 		 * - CVMX_POW_TAG_TYPE_NULL_NULL
1167  *  hardware assumes that an aligned 64-bit store was used for all
1169  *  aligned on an 8-byte boundary (since the low-order 3 address bits
1175  *     - did<2:0> == 0	    => pending switch bit is set
1176  *     - did<2:0> == 1	    => no affect on the pending switch bit
1177  *     - did<2:0> == 3	    => pending switch bit is cleared
1178  *     - did<2:0> == 7	    => no affect on the pending switch bit
1179  *     - did<2:0> == others => must not be used
1180  *     - No other loads/stores have an affect on the pending switch bit
1181  *     - The switch bus from POW can clear the pending switch bit
1183  *  NOTE: did<2:0> == 2 is used by the HW for a special single-cycle
1199 		/* Device ID of POW.  Note that different sub-dids are used. */
1224 		 * the (64-bit word) location in scratchpad to write
1230 		/* the ID of the device on the non-coherent bus */
1248 /* CSR typedefs have been moved to cvmx-csr-*.h */
1252  * tag type, tag, group, and POW entry index associated with
1253  * this core. Index is only valid if the tag type isn't NULL_NULL.
1274 	result.s.index = load_resp.s_sstatus2.index;  in cvmx_pow_get_current_tag()
1335 			start_cycle = -MAX_CYCLES - 1;  in cvmx_pow_tag_sw_wait()
1639  * @group:    group value for the work queue entry.
1643 						uint64_t group)  in cvmx_pow_tag_sw_full_nocheck()  argument
1680 	tag_req.s.grp = group;  in cvmx_pow_tag_sw_full_nocheck()
1713  * @group:	group value for the work queue entry.
1717 					uint64_t group)  in cvmx_pow_tag_sw_full()  argument
1728 	cvmx_pow_tag_sw_full_nocheck(wqp, tag, tag_type, group);  in cvmx_pow_tag_sw_full()
1804  * @grp:      group value for the work queue entry.
1813 	wqp->word1.tag = tag;  in cvmx_pow_work_submit()
1814 	wqp->word1.tag_type = tag_type;  in cvmx_pow_work_submit()
1841  * This function sets the group mask for a core.  The group mask
1846  * @mask:   Group mask. There are 16 groups, so only bits 0-15 are valid,
1847  *		 representing groups 0-15.
1849  *		 the corresponding group.
1865  * @priority:	Vector of 8 priorities, one per POW Input Queue (0-7).
1899 			if (prio_mask ^ ((1 << cvmx_pop(prio_mask)) - 1)) {  in cvmx_pow_set_priority()
1920  * re-scheduling DE-SCHEDULEd items whose (next) state is
1922  *   - If there are no switches pending at the time that the
1923  *     HW executes the de-schedule, the HW will only re-schedule
1931  *   - If there is a pending switch to ORDERED at the time
1932  *     the HW executes the de-schedule, the HW will perform
1933  *     the switch at the time it re-schedules, and will be
1938  * DE-SCHEDULE. If an ORDERED tag is what was really desired,
1940  * after the work (that has an ATOMIC tag) is re-scheduled.
1942  * when the HW re-schedules, this switch can be IMMEDIATE upon
1943  * the reception of the pointer during the re-schedule.
1947  * @group:    New group value
1949  *		   - 1 : don't schedule this work
1950  *		   - 0 : allow this work to be scheduled.
1955 	uint64_t group,  in cvmx_pow_tag_sw_desched_nocheck()  argument
1980 	tag_req.s.grp = group;  in cvmx_pow_tag_sw_desched_nocheck()
2003  * re-scheduling DE-SCHEDULEd items whose (next) state is
2005  *   - If there are no switches pending at the time that the
2006  *     HW executes the de-schedule, the HW will only re-schedule
2014  *   - If there is a pending switch to ORDERED at the time
2015  *     the HW executes the de-schedule, the HW will perform
2016  *     the switch at the time it re-schedules, and will be
2021  * DE-SCHEDULE. If an ORDERED tag is what was really desired,
2023  * after the work (that has an ATOMIC tag) is re-scheduled.
2025  * when the HW re-schedules, this switch can be IMMEDIATE upon
2026  * the reception of the pointer during the re-schedule.
2030  * @group:    New group value
2032  *		   - 1 : don't schedule this work
2033  *		   - 0 : allow this work to be scheduled.
2037 					   uint64_t group, uint64_t no_sched)  in cvmx_pow_tag_sw_desched()  argument
2050 	cvmx_pow_tag_sw_desched_nocheck(tag, tag_type, group, no_sched);  in cvmx_pow_tag_sw_desched()
2095 * Define usage of bits within the 32 bit tag values.
2099  * Number of bits of the tag used by software.	The SW bits are always
2101  * bits are always the low bits.  By default, the top 8 bits of the
2106 #define CVMX_TAG_SW_SHIFT   (32 - CVMX_TAG_SW_BITS)
2108 /* Below is the list of values for the top 8 bits of the tag. */
2114 /* The executive divides the remaining 24 bits as follows:
2115  *  - the upper 8 bits (bits 23 - 16 of the tag) define a subgroup
2117  *  - the lower 16 bits (bits 15 - 0 of the tag) define are the value
2121  * software - refer to the hardware documentation for a description of
2133  * The remaining values software bit values 0x2 - 0xff are available
2140  * @sw_bits: The upper bits (number depends on configuration) are set
2141  *	     to this value.  The remainder of bits are set by the
2144  * @hw_bits: The lower bits (number depends on configuration) are set
2145  *	     to this value.  The remainder of bits are set by the
2148  * Returns 32 bit value of the combined hw and sw bits.
2154 		(hw_bits & cvmx_build_mask(32 - CVMX_TAG_SW_BITS));  in cvmx_pow_tag_compose()
2158  * Extracts the bits allocated for software use from the tag
2167 	return (tag >> (32 - CVMX_TAG_SW_BITS)) &  in cvmx_pow_tag_get_sw_bits()
2173  * Extracts the bits allocated for hardware use from the tag
2177  * Returns (32 - N) bit software tag value, where N is configurable
2182 	return tag & cvmx_build_mask(32 - CVMX_TAG_SW_BITS);  in cvmx_pow_tag_get_hw_bits()