Lines Matching +full:broken +full:- +full:save +full:- +full:restore +full:- +full:fw
6 * Copyright (C) 2004-2007 Cavium Networks
8 * written by Ralf Baechle <ralf@linux-mips.org>
35 #include <asm/smp-ops.h>
40 #include <asm/fw/fw.h>
46 #include <asm/octeon/pci-octeon.h>
47 #include <asm/octeon/cvmx-rst-defs.h>
50 * TRUE for devices having registers with little-endian byte
51 * order, FALSE for registers with native-endian byte order.
52 * PCI mandates little-endian, USB and SATA are configuraable,
53 * but we chose little-endian for these.
129 bootmem_desc->major_version = CVMX_BOOTMEM_DESC_MAJ_VER; in kexec_bootmem_init()
130 bootmem_desc->minor_version = CVMX_BOOTMEM_DESC_MIN_VER; in kexec_bootmem_init()
133 bootmem_desc->head_addr = 0; in kexec_bootmem_init()
137 mem_size - reserve_low_mem - in kexec_bootmem_init()
143 OCTEON_DDR0_SIZE - reserve_low_mem - in kexec_bootmem_init()
146 mem_size -= OCTEON_DDR0_SIZE; in kexec_bootmem_init()
151 mem_size - OCTEON_DDR1_SIZE, 0); in kexec_bootmem_init()
161 octeon_boot_desc_ptr->argc = 0; in octeon_kexec_prepare()
162 for (i = 0; i < image->nr_segments; i++) { in octeon_kexec_prepare()
163 if (!strncmp(bootloader, (char *)image->segment[i].buf, in octeon_kexec_prepare()
170 char *str = (char *)image->segment[i].buf; in octeon_kexec_prepare()
175 offt = (int)(ptr - str + 1); in octeon_kexec_prepare()
176 octeon_boot_desc_ptr->argv[argc] = in octeon_kexec_prepare()
177 image->segment[i].mem + offt; in octeon_kexec_prepare()
182 octeon_boot_desc_ptr->argc = argc; in octeon_kexec_prepare()
188 * Information about segments will be needed during pre-boot memory in octeon_kexec_prepare()
206 cvmx_phys_to_ptr(bootmem_desc->named_block_array_addr); in octeon_generic_shutdown()
224 kexec_bootmem_init(octeon_bootinfo->dram_size*1024ULL*1024ULL, in octeon_generic_shutdown()
229 for (i = 0; i < kimage_ptr->nr_segments; i++) in octeon_generic_shutdown()
231 kimage_ptr->segment[i].memsz + 2*PAGE_SIZE, in octeon_generic_shutdown()
232 kimage_ptr->segment[i].mem - PAGE_SIZE, in octeon_generic_shutdown()
243 for (i = 0; i < bootmem_desc->named_block_num_blocks; i++) in octeon_generic_shutdown()
301 * octeon_is_simulation - Return non-zero if we are currently running
304 * Return: non-0 if running in the Octeon simulator, 0 otherwise
308 return octeon_bootinfo->board_type == CVMX_BOARD_TYPE_SIM; in octeon_is_simulation()
313 * octeon_is_pci_host - Return true if Octeon is in PCI Host mode. This means
316 * Return: Non-zero if Octeon is in host mode.
321 return octeon_bootinfo->config_flags & CVMX_BOOTINFO_CFG_FLAG_PCI_HOST; in octeon_is_pci_host()
328 * octeon_get_clock_rate - Get the clock rate of Octeon
336 return sysinfo->cpu_clock_hz; in octeon_get_clock_rate()
350 * octeon_write_lcd - Write to the LCD display connected to the bootbus.
358 if (octeon_bootinfo->led_display_base_addr) { in octeon_write_lcd()
360 ioremap(octeon_bootinfo->led_display_base_addr, in octeon_write_lcd()
374 * octeon_get_boot_uart - Return the console uart passed by the bootloader
380 return (octeon_boot_desc_ptr->flags & OCTEON_BL_FLAG_CONSOLE_UART1) ? in octeon_get_boot_uart()
385 * octeon_get_boot_coremask - Get the coremask Linux was booted on.
391 return octeon_boot_desc_ptr->core_mask; in octeon_get_boot_coremask()
395 * octeon_check_cpu_bist - Check the hardware BIST results for a CPU
426 * octeon_restart - Reboot Octeon
451 * octeon_kill_core - Permanently stop a core.
471 * octeon_halt - Halt the system
477 switch (octeon_bootinfo->board_type) { in octeon_halt()
497 board_type = cvmx_board_type_to_string(octeon_bootinfo->board_type); in init_octeon_system_type()
514 * octeon_board_type_string - Return a string representing the system type
532 /* R/W If set, marked write-buffer entries time out the same in octeon_user_io_init()
533 * as other entries; if clear, marked write-buffer entries in octeon_user_io_init()
536 /* R/W If set, a merged store does not clear the write-buffer in octeon_user_io_init()
555 /* R/W If set (and SX set), supervisor-level loads/stores can in octeon_user_io_init()
559 /* R/W If set (and UX set), user-level loads/stores can use in octeon_user_io_init()
563 /* R/W If set (and SX set), supervisor-level loads/stores can in octeon_user_io_init()
567 /* R/W If set (and UX set), user-level loads/stores can use in octeon_user_io_init()
578 /* R/W Selects the bit in the counter used for DID time-outs 0 in octeon_user_io_init()
579 * = 231, 1 = 230, 2 = 229, 3 = 214. Actual time-out is in octeon_user_io_init()
588 * flush time-outs (WBFLT+11) is the bit position in an in octeon_user_io_init()
598 * R/W The write buffer threshold. As per erratum Core-14752 in octeon_user_io_init()
624 /* Setup of CVMSEG is done in kernel-entry-init.h */ in octeon_user_io_init()
657 * prom_init - Early entry point for arch setup
673 cvmx_phys_to_ptr(octeon_boot_desc_ptr->cvmx_desc_vaddr); in prom_init()
674 cvmx_bootmem_init(cvmx_phys_to_ptr(octeon_bootinfo->phy_mem_desc_addr)); in prom_init()
678 sysinfo->system_dram_size = octeon_bootinfo->dram_size << 20; in prom_init()
679 sysinfo->phy_mem_desc_addr = (u64)phys_to_virt(octeon_bootinfo->phy_mem_desc_addr); in prom_init()
681 if ((octeon_bootinfo->major_version > 1) || in prom_init()
682 (octeon_bootinfo->major_version == 1 && in prom_init()
683 octeon_bootinfo->minor_version >= 4)) in prom_init()
684 cvmx_coremask_copy(&sysinfo->core_mask, in prom_init()
685 &octeon_bootinfo->ext_core_mask); in prom_init()
687 cvmx_coremask_set64(&sysinfo->core_mask, in prom_init()
688 octeon_bootinfo->core_mask); in prom_init()
690 /* Some broken u-boot pass garbage in upper bits, clear them out */ in prom_init()
693 cvmx_coremask_clear_core(&sysinfo->core_mask, i); in prom_init()
695 sysinfo->exception_base_addr = octeon_bootinfo->exception_base_addr; in prom_init()
696 sysinfo->cpu_clock_hz = octeon_bootinfo->eclock_hz; in prom_init()
697 sysinfo->dram_data_rate_hz = octeon_bootinfo->dclock_hz * 2; in prom_init()
698 sysinfo->board_type = octeon_bootinfo->board_type; in prom_init()
699 sysinfo->board_rev_major = octeon_bootinfo->board_rev_major; in prom_init()
700 sysinfo->board_rev_minor = octeon_bootinfo->board_rev_minor; in prom_init()
701 memcpy(sysinfo->mac_addr_base, octeon_bootinfo->mac_addr_base, in prom_init()
702 sizeof(sysinfo->mac_addr_base)); in prom_init()
703 sysinfo->mac_addr_count = octeon_bootinfo->mac_addr_count; in prom_init()
704 memcpy(sysinfo->board_serial_number, in prom_init()
705 octeon_bootinfo->board_serial_number, in prom_init()
706 sizeof(sysinfo->board_serial_number)); in prom_init()
707 sysinfo->compact_flash_common_base_addr = in prom_init()
708 octeon_bootinfo->compact_flash_common_base_addr; in prom_init()
709 sysinfo->compact_flash_attribute_base_addr = in prom_init()
710 octeon_bootinfo->compact_flash_attribute_base_addr; in prom_init()
711 sysinfo->led_display_base_addr = octeon_bootinfo->led_display_base_addr; in prom_init()
712 sysinfo->dfa_ref_clock_hz = octeon_bootinfo->dfa_ref_clock_hz; in prom_init()
713 sysinfo->bootloader_config_flags = octeon_bootinfo->config_flags; in prom_init()
726 octeon_io_clock_rate = sysinfo->cpu_clock_hz; in prom_init()
732 * Setup the multiplier save/restore code if in prom_init()
735 void *save; in prom_init() local
737 void *restore; in prom_init() local
741 int save_max = (char *)octeon_mult_save_end - in prom_init()
743 int restore_max = (char *)octeon_mult_restore_end - in prom_init()
746 save = octeon_mult_save3; in prom_init()
748 restore = octeon_mult_restore3; in prom_init()
751 save = octeon_mult_save2; in prom_init()
753 restore = octeon_mult_restore2; in prom_init()
756 save_len = (char *)save_end - (char *)save; in prom_init()
757 restore_len = (char *)restore_end - (char *)restore; in prom_init()
760 memcpy(octeon_mult_save, save, save_len); in prom_init()
761 memcpy(octeon_mult_restore, restore, restore_len); in prom_init()
845 * enabled. Unfortunately due to a chip errata G-200 for in prom_init()
868 argc = octeon_boot_desc_ptr->argc; in prom_init()
871 cvmx_phys_to_ptr(octeon_boot_desc_ptr->argv[i]); in prom_init()
888 * parse_crashkernel(arg, sysinfo->system_dram_size, in prom_init()
893 sizeof(arcs_cmdline) - 1) { in prom_init()
931 u64 inc = addr - *mem; in memory_exclude_page()
934 *size -= inc; in memory_exclude_page()
939 *size -= PAGE_SIZE; in memory_exclude_page()
949 for (i = 0; i < octeon_boot_desc_ptr->argc; i++) { in fw_init_cmdline()
951 cvmx_phys_to_ptr(octeon_boot_desc_ptr->argv[i]); in fw_init_cmdline()
953 sizeof(arcs_cmdline) - 1) { in fw_init_cmdline()
963 cvmx_phys_to_ptr(octeon_boot_desc_ptr->cvmx_desc_vaddr); in plat_get_fdt()
964 return phys_to_virt(octeon_bootinfo->fdt_addr); in plat_get_fdt()
1008 __pa_symbol(&_end), -1, in plat_mem_setup()
1020 * try to allocate multi-page buffers that in plat_mem_setup()
1038 memblock_add(memory, crashk_base - memory); in plat_mem_setup()
1039 total += crashk_base - memory; in plat_mem_setup()
1040 memblock_add(crashk_end, end - crashk_end); in plat_mem_setup()
1041 total += end - crashk_end; in plat_mem_setup()
1058 mem_alloc_size -= crashk_end - memory; in plat_mem_setup()
1066 mem_alloc_size -= end - crashk_base; in plat_mem_setup()
1113 /* Check for presence of Core-14449 fix. */ in prom_free_prom_memory()
1126 "1:\tlw %0,-12($31)\n\t" in prom_free_prom_memory()
1131 panic("No PREF instruction at Core-14449 probe point."); in prom_free_prom_memory()
1156 if (octeon_bootinfo->minor_version >= 3 && octeon_bootinfo->fdt_addr) { in device_tree_init()
1157 fdt = phys_to_virt(octeon_bootinfo->fdt_addr); in device_tree_init()
1211 dev = platform_device_register_simple(name, -1, NULL, 0); in edac_devinit()
1239 * later re-initialize these to correct values if they are present. in octeon_no_pci_init()