dts/xilfpga/nexys4ddr.dts

1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
14 		stdout-path = "serial0:115200n8";
22 	cpuintc: interrupt-controller {
23 		#address-cells = <0>;
24 		#interrupt-cells = <1>;
25 		interrupt-controller;
26 		compatible = "mti,cpu-interrupt-controller";
29 	axi_intc: interrupt-controller@10200000 {
30 		#interrupt-cells = <1>;
31 		compatible = "xlnx,xps-intc-1.00.a";
32 		interrupt-controller;
34 		xlnx,kind-of-intr = <0x0>;
35 		xlnx,num-intr-inputs = <0x6>;
37 		interrupt-parent = <&cpuintc>;
42 		#gpio-cells = <1>;
43 		compatible = "xlnx,xps-gpio-1.00.a";
44 		gpio-controller;
46 		xlnx,all-inputs = <0x0>;
47 		xlnx,dout-default = <0x0>;
48 		xlnx,gpio-width = <0x16>;
49 		xlnx,interrupt-present = <0x0>;
50 		xlnx,is-dual = <0x0>;
51 		xlnx,tri-default = <0xffffffff>;
55 		compatible = "xlnx,xps-ethernetlite-3.00.a";
57 		interrupt-parent = <&axi_intc>;
59 		phy-handle = <&phy0>;
62 		xlnx,include-global-buffers = <0x1>;
63 		xlnx,include-internal-loopback = <0x0>;
64 		xlnx,include-mdio = <0x1>;
66 		xlnx,rx-ping-pong = <0x1>;
67 		xlnx,s-axi-id-width = <0x1>;
68 		xlnx,tx-ping-pong = <0x1>;
69 		xlnx,use-internal = <0x0>;
71 			#address-cells = <1>;
72 			#size-cells = <0>;
74 				device_type = "ethernet-phy";
84 		reg-shift = <2>;
85 		reg-offset = <0x1000>;
89 		interrupt-parent = <&axi_intc>;
94 	    compatible = "xlnx,xps-iic-2.00.a";
95 	    interrupt-parent = <&axi_intc>;
99 	    xlnx,clk-freq = <0x5f5e100>;
101 	    xlnx,gpo-width = <0x1>;
102 	    xlnx,iic-freq = <0x186a0>;
103 	    xlnx,scl-inertial-delay = <0x0>;
104 	    xlnx,sda-inertial-delay = <0x0>;
105 	    xlnx,ten-bit-adr = <0x0>;
106 	    #address-cells = <1>;
107 	    #size-cells = <0>;
117 	clock-frequency = <50000000>;