Lines Matching +full:0 +full:x1210000
11 #size-cells = <0>;
13 cpu@0 {
17 reg = <0>;
26 #address-cells = <0>;
34 #clock-cells = <0>;
40 #clock-cells = <0>;
50 ranges = <0 0x70000000 0x2000000>;
54 cpu_ctrl: syscon@0 {
56 reg = <0x0 0x2c>;
61 reg = <0x70 0x70>;
69 pinctrl-0 = <&uart_pins>;
72 reg = <0x100000 0x20>;
83 pinctrl-0 = <&i2c_pins>;
85 reg = <0x100400 0x100>, <0x198 0x8>;
87 #size-cells = <0>;
95 pinctrl-0 = <&uart2_pins>;
98 reg = <0x100800 0x20>;
110 #size-cells = <0>;
111 reg = <0x101000 0x100>, <0x3c 0x18>;
120 reg = <0x1010000 0x10000>,
121 <0x1030000 0x10000>,
122 <0x1080000 0x100>,
123 <0x10e0000 0x10000>,
124 <0x11e0000 0x100>,
125 <0x11f0000 0x100>,
126 <0x1200000 0x100>,
127 <0x1210000 0x100>,
128 <0x1220000 0x100>,
129 <0x1230000 0x100>,
130 <0x1240000 0x100>,
131 <0x1250000 0x100>,
132 <0x1260000 0x100>,
133 <0x1270000 0x100>,
134 <0x1280000 0x100>,
135 <0x1800000 0x80000>,
136 <0x1880000 0x10000>,
137 <0x1040000 0x10000>,
138 <0x1050000 0x10000>,
139 <0x1060000 0x10000>,
140 <0x1a0 0x1c4>;
150 #size-cells = <0>;
152 port0: port@0 {
153 reg = <0>;
201 reg = <0x1070008 0x4>;
206 reg = <0x1070034 0x68>;
209 gpio-ranges = <&gpio 0 0 22>;
238 #size-cells = <0>;
240 reg = <0x107009c 0x24>, <0x10700f0 0x8>;
244 phy0: ethernet-phy@0 {
245 reg = <0>;
260 #size-cells = <0>;
262 reg = <0x10700c0 0x24>;
265 pinctrl-0 = <&miim1_pins>;
271 reg = <0x10d0000 0x10000>;