Lines Matching +full:fixed +full:- +full:clock
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
6 #include <dt-bindings/clock/mobileye,eyeq5-clk.h>
9 /* Fixed clock */
11 compatible = "fixed-clock";
12 #clock-cells = <0>;
13 clock-frequency = <30000000>;
17 occ_cpu: occ-cpu {
18 compatible = "fixed-factor-clock";
20 #clock-cells = <0>;
21 clock-div = <1>;
22 clock-mult = <1>;
24 si_css0_ref_clk: si-css0-ref-clk { /* gate ClkRstGen_si_css0_ref */
25 compatible = "fixed-factor-clock";
27 #clock-cells = <0>;
28 clock-div = <1>;
29 clock-mult = <1>;
31 cpc_clk: cpc-clk {
32 compatible = "fixed-factor-clock";
34 #clock-cells = <0>;
35 clock-div = <1>;
36 clock-mult = <1>;
38 core0_clk: core0-clk {
39 compatible = "fixed-factor-clock";
41 #clock-cells = <0>;
42 clock-div = <1>;
43 clock-mult = <1>;
45 core1_clk: core1-clk {
46 compatible = "fixed-factor-clock";
48 #clock-cells = <0>;
49 clock-div = <1>;
50 clock-mult = <1>;
52 core2_clk: core2-clk {
53 compatible = "fixed-factor-clock";
55 #clock-cells = <0>;
56 clock-div = <1>;
57 clock-mult = <1>;
59 core3_clk: core3-clk {
60 compatible = "fixed-factor-clock";
62 #clock-cells = <0>;
63 clock-div = <1>;
64 clock-mult = <1>;
66 cm_clk: cm-clk {
67 compatible = "fixed-factor-clock";
69 #clock-cells = <0>;
70 clock-div = <1>;
71 clock-mult = <1>;
73 mem_clk: mem-clk {
74 compatible = "fixed-factor-clock";
76 #clock-cells = <0>;
77 clock-div = <1>;
78 clock-mult = <1>;
80 occ_isram: occ-isram {
81 compatible = "fixed-factor-clock";
83 #clock-cells = <0>;
84 clock-div = <2>;
85 clock-mult = <1>;
87 isram_clk: isram-clk { /* gate ClkRstGen_isram */
88 compatible = "fixed-factor-clock";
90 #clock-cells = <0>;
91 clock-div = <1>;
92 clock-mult = <1>;
94 occ_dbu: occ-dbu {
95 compatible = "fixed-factor-clock";
97 #clock-cells = <0>;
98 clock-div = <10>;
99 clock-mult = <1>;
101 si_dbu_tp_pclk: si-dbu-tp-pclk { /* gate ClkRstGen_dbu */
102 compatible = "fixed-factor-clock";
104 #clock-cells = <0>;
105 clock-div = <1>;
106 clock-mult = <1>;
109 occ_vdi: occ-vdi {
110 compatible = "fixed-factor-clock";
112 #clock-cells = <0>;
113 clock-div = <2>;
114 clock-mult = <1>;
116 vdi_clk: vdi-clk { /* gate ClkRstGen_vdi */
117 compatible = "fixed-factor-clock";
119 #clock-cells = <0>;
120 clock-div = <1>;
121 clock-mult = <1>;
123 occ_can_ser: occ-can-ser {
124 compatible = "fixed-factor-clock";
126 #clock-cells = <0>;
127 clock-div = <16>;
128 clock-mult = <1>;
130 can_ser_clk: can-ser-clk { /* gate ClkRstGen_can_ser */
131 compatible = "fixed-factor-clock";
133 #clock-cells = <0>;
134 clock-div = <1>;
135 clock-mult = <1>;
137 i2c_ser_clk: i2c-ser-clk {
138 compatible = "fixed-factor-clock";
140 #clock-cells = <0>;
141 clock-div = <20>;
142 clock-mult = <1>;
145 occ_periph: occ-periph {
146 compatible = "fixed-factor-clock";
148 #clock-cells = <0>;
149 clock-div = <16>;
150 clock-mult = <1>;
152 periph_clk: periph-clk {
153 compatible = "fixed-factor-clock";
155 #clock-cells = <0>;
156 clock-div = <1>;
157 clock-mult = <1>;
159 can_clk: can-clk {
160 compatible = "fixed-factor-clock";
162 #clock-cells = <0>;
163 clock-div = <1>;
164 clock-mult = <1>;
166 spi_clk: spi-clk {
167 compatible = "fixed-factor-clock";
169 #clock-cells = <0>;
170 clock-div = <1>;
171 clock-mult = <1>;
173 uart_clk: uart-clk {
174 compatible = "fixed-factor-clock";
176 #clock-cells = <0>;
177 clock-div = <1>;
178 clock-mult = <1>;
180 i2c_clk: i2c-clk {
181 compatible = "fixed-factor-clock";
183 #clock-cells = <0>;
184 clock-div = <1>;
185 clock-mult = <1>;
186 clock-output-names = "i2c_clk";
188 timer_clk: timer-clk {
189 compatible = "fixed-factor-clock";
191 #clock-cells = <0>;
192 clock-div = <1>;
193 clock-mult = <1>;
194 clock-output-names = "timer_clk";
196 gpio_clk: gpio-clk {
197 compatible = "fixed-factor-clock";
199 #clock-cells = <0>;
200 clock-div = <1>;
201 clock-mult = <1>;
202 clock-output-names = "gpio_clk";
204 emmc_sys_clk: emmc-sys-clk {
205 compatible = "fixed-factor-clock";
207 #clock-cells = <0>;
208 clock-div = <10>;
209 clock-mult = <1>;
210 clock-output-names = "emmc_sys_clk";
212 ccf_ctrl_clk: ccf-ctrl-clk {
213 compatible = "fixed-factor-clock";
215 #clock-cells = <0>;
216 clock-div = <4>;
217 clock-mult = <1>;
218 clock-output-names = "ccf_ctrl_clk";
220 occ_mjpeg_core: occ-mjpeg-core {
221 compatible = "fixed-factor-clock";
223 #clock-cells = <0>;
224 clock-div = <2>;
225 clock-mult = <1>;
226 clock-output-names = "occ_mjpeg_core";
228 hsm_clk: hsm-clk { /* gate ClkRstGen_hsm */
229 compatible = "fixed-factor-clock";
231 #clock-cells = <0>;
232 clock-div = <1>;
233 clock-mult = <1>;
234 clock-output-names = "hsm_clk";
236 mjpeg_core_clk: mjpeg-core-clk { /* gate ClkRstGen_mjpeg_gen */
237 compatible = "fixed-factor-clock";
239 #clock-cells = <0>;
240 clock-div = <1>;
241 clock-mult = <1>;
242 clock-output-names = "mjpeg_core_clk";
244 fcmu_a_clk: fcmu-a-clk {
245 compatible = "fixed-factor-clock";
247 #clock-cells = <0>;
248 clock-div = <20>;
249 clock-mult = <1>;
250 clock-output-names = "fcmu_a_clk";
252 occ_pci_sys: occ-pci-sys {
253 compatible = "fixed-factor-clock";
255 #clock-cells = <0>;
256 clock-div = <8>;
257 clock-mult = <1>;
258 clock-output-names = "occ_pci_sys";
261 compatible = "fixed-clock";
262 #clock-cells = <0>;
263 clock-frequency = <250000000>; /* 250MHz */
265 tsu_clk: tsu-clk {
266 compatible = "fixed-clock";
267 #clock-cells = <0>;
268 clock-frequency = <125000000>; /* 125MHz */