dts/loongson/loongson64-2k1000.dtsi

15 		#size-cells = <0>;
17 		cpu0: cpu@0 {
20 			reg = <0x0>;
27 		#clock-cells = <0>;
33 		#address-cells = <0>;
43 		ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* ioports */
44 			0 0x40000000 0 0x40000000 0 0x40000000
45 			0xfe 0x00000000 0xfe 0x00000000 0 0x40000000>;
51 			ranges = <1 0x0 0x0 0x18000000 0x4000>;
56 			reg = <0 0x1fe07000 0 0x422>;
61 			reg = <0 0x1fe11400 0 0x40>,
62 				<0 0x1fe11040 0 0x8>,
63 				<0 0x1fe11140 0 0x8>;
73 			loongson,parent_int_map = <0xffffffff>, /* int0 */
74 						<0x00000000>, /* int1 */
75 						<0x00000000>, /* int2 */
76 						<0x00000000>; /* int3 */
81 			reg = <0 0x1fe11440 0 0x40>,
82 				<0 0x1fe11048 0 0x8>,
83 				<0 0x1fe11148 0 0x8>;
93 			loongson,parent_int_map = <0x00000000>, /* int0 */
94 						<0xffffffff>, /* int1 */
95 						<0x00000000>, /* int2 */
96 						<0x00000000>; /* int3 */
101 			reg = <0 0x1fe07800 0 0x78>;
108 			reg = <0 0x1fe00000 0 0x8>;
111 			interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
121 			reg = <0 0x1a000000 0 0x02000000>,
122 				<0xfe 0x00000000 0 0x20000000>;
124 			ranges = <0x01000000 0x0 0x00000000 0x0 0x18000000  0x0 0x00010000>,
125 				 <0x02000000 0x0 0x40000000 0x0 0x40000000  0x0 0x40000000>;
127 			gmac@3,0 {
128 				compatible = "pci0014,7a03.0",
133 				reg = <0x1800 0x0 0x0 0x0 0x0>;
142 					#size-cells = <0>;
144 					phy0: ethernet-phy@0 {
145 						reg = <0>;
151 				compatible = "pci0014,7a03.0",
157 				reg = <0x1900 0x0 0x0 0x0 0x0>;
166 					#size-cells = <0>;
169 						reg = <0>;
175 				compatible = "pci0014,7a14.0",
180 				reg = <0x2100 0x0 0x0 0x0 0x0>;
186 				compatible = "pci0014,7a24.0",
191 				reg = <0x2200 0x0 0x0 0x0 0x0>;
196 			sata@8,0 {
197 				compatible = "pci0014,7a08.0",
202 				reg = <0x4000 0x0 0x0 0x0 0x0>;
207 			pcie@9,0 {
208 				compatible = "pci0014,7a19.0",
213 				reg = <0x4800 0x0 0x0 0x0 0x0>;
218 				interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
220 				interrupt-map-mask = <0 0 0 0>;
221 				interrupt-map = <0 0 0 0 &liointc1 0 IRQ_TYPE_LEVEL_HIGH>;
226 			pcie@a,0 {
227 				compatible = "pci0014,7a09.0",
232 				reg = <0x5000 0x0 0x0 0x0 0x0>;
239 				interrupt-map-mask = <0 0 0 0>;
240 				interrupt-map = <0 0 0 0 &liointc1 1 IRQ_TYPE_LEVEL_HIGH>;
245 			pcie@b,0 {
246 				compatible = "pci0014,7a09.0",
251 				reg = <0x5800 0x0 0x0 0x0 0x0>;
258 				interrupt-map-mask = <0 0 0 0>;
259 				interrupt-map = <0 0 0 0 &liointc1 2 IRQ_TYPE_LEVEL_HIGH>;
264 			pcie@c,0 {
265 				compatible = "pci0014,7a09.0",
270 				reg = <0x6000 0x0 0x0 0x0 0x0>;
277 				interrupt-map-mask = <0 0 0 0>;
278 				interrupt-map = <0 0 0 0 &liointc1 3 IRQ_TYPE_LEVEL_HIGH>;
283 			pcie@d,0 {
284 				compatible = "pci0014,7a19.0",
289 				reg = <0x6800 0x0 0x0 0x0 0x0>;
296 				interrupt-map-mask = <0 0 0 0>;
297 				interrupt-map = <0 0 0 0 &liointc1 4 IRQ_TYPE_LEVEL_HIGH>;
302 			pcie@e,0 {
303 				compatible = "pci0014,7a09.0",
308 				reg = <0x7000 0x0 0x0 0x0 0x0>;
315 				interrupt-map-mask = <0 0 0 0>;
316 				interrupt-map = <0 0 0 0 &liointc1 5 IRQ_TYPE_LEVEL_HIGH>;