Lines Matching refs:clk_periph
48 clocks = <&clk_periph PERIPH_CLK_I2C0>,
51 assigned-clocks = <&clk_periph PERIPH_CLK_I2C0_PRE_DIV>,
52 <&clk_periph PERIPH_CLK_I2C0_DIV>;
66 clocks = <&clk_periph PERIPH_CLK_I2C1>,
69 assigned-clocks = <&clk_periph PERIPH_CLK_I2C1_PRE_DIV>,
70 <&clk_periph PERIPH_CLK_I2C1_DIV>;
84 clocks = <&clk_periph PERIPH_CLK_I2C2>,
87 assigned-clocks = <&clk_periph PERIPH_CLK_I2C2_PRE_DIV>,
88 <&clk_periph PERIPH_CLK_I2C2_DIV>;
102 clocks = <&clk_periph PERIPH_CLK_I2C3>,
105 assigned-clocks = <&clk_periph PERIPH_CLK_I2C3_PRE_DIV>,
106 <&clk_periph PERIPH_CLK_I2C3_DIV>;
245 clocks = <&clk_periph PERIPH_CLK_PWM>,
738 clocks = <&clk_periph PERIPH_CLK_COUNTER_FAST>,
748 clocks = <&clk_periph PERIPH_CLK_WD>, <&cr_periph SYS_CLK_WD>;
750 assigned-clocks = <&clk_periph PERIPH_CLK_WD_PRE_DIV>,
751 <&clk_periph PERIPH_CLK_WD_DIV>;
759 clocks = <&clk_periph PERIPH_CLK_IR>, <&cr_periph SYS_CLK_IR>;
761 assigned-clocks = <&clk_periph PERIPH_CLK_IR_PRE_DIV>,
762 <&clk_periph PERIPH_CLK_IR_DIV>;
851 clk_periph: clk@18144800 { label
862 clocks = <&clk_periph PERIPH_CLK_SYS>;
885 <&clk_periph PERIPH_CLK_ROM>;