Lines Matching +full:reg +full:- +full:init
1 // SPDX-License-Identifier: GPL-2.0
6 * use. Because of this, it contains a super-set of the available
15 phy0: ethernet-phy@0 {
17 marvell,reg-init =
19 <2 0x15 0xffcf 0>, /* Reg 2,21 Clear bits 4, 5 */
21 <3 0x11 0 0x442a>, /* Reg 3,17 <- 0442a */
22 /* irq, blink-activity, blink-link */
23 <3 0x10 0 0x0242>; /* Reg 3,16 <- 0x0242 */
24 reg = <0>;
27 phy1: ethernet-phy@1 {
29 marvell,reg-init =
31 <2 0x15 0xffcf 0>, /* Reg 2,21 Clear bits 4, 5 */
33 <3 0x11 0 0x442a>, /* Reg 3,17 <- 0442a */
34 /* irq, blink-activity, blink-link */
35 <3 0x10 0 0x0242>; /* Reg 3,16 <- 0x0242 */
36 reg = <1>;
39 phy2: ethernet-phy@2 {
40 reg = <2>;
42 marvell,reg-init = <3 0x10 0 0x5777>,
47 phy3: ethernet-phy@3 {
48 reg = <3>;
50 marvell,reg-init = <3 0x10 0 0x5777>,
55 phy4: ethernet-phy@4 {
56 reg = <4>;
58 marvell,reg-init = <3 0x10 0 0x5777>,
63 phy5: ethernet-phy@5 {
64 reg = <5>;
66 marvell,reg-init = <3 0x10 0 0x5777>,
72 phy6: ethernet-phy@6 {
73 reg = <6>;
75 marvell,reg-init = <3 0x10 0 0x5777>,
80 phy7: ethernet-phy@7 {
81 reg = <7>;
83 marvell,reg-init = <3 0x10 0 0x5777>,
88 phy8: ethernet-phy@8 {
89 reg = <8>;
91 marvell,reg-init = <3 0x10 0 0x5777>,
96 phy9: ethernet-phy@9 {
97 reg = <9>;
99 marvell,reg-init = <3 0x10 0 0x5777>,
107 compatible = "cavium,octeon-3860-mdio";
108 #address-cells = <1>;
109 #size-cells = <0>;
110 reg = <0x11800 0x00001900 0x0 0x40>;
112 phy100: ethernet-phy@1 {
113 reg = <1>;
115 marvell,reg-init = <3 0x10 0 0x5777>,
119 interrupt-parent = <&gpio>;
122 phy101: ethernet-phy@2 {
123 reg = <2>;
125 marvell,reg-init = <3 0x10 0 0x5777>,
129 interrupt-parent = <&gpio>;
132 phy102: ethernet-phy@3 {
133 reg = <3>;
135 marvell,reg-init = <3 0x10 0 0x5777>,
139 interrupt-parent = <&gpio>;
142 phy103: ethernet-phy@4 {
143 reg = <4>;
145 marvell,reg-init = <3 0x10 0 0x5777>,
149 interrupt-parent = <&gpio>;
155 compatible = "cavium,octeon-5750-mix";
156 reg = <0x10700 0x00100000 0x0 0x100>, /* MIX */
160 cell-index = <0>;
162 local-mac-address = [ 00 00 00 00 00 00 ];
163 phy-handle = <&phy0>;
167 compatible = "cavium,octeon-5750-mix";
168 reg = <0x10700 0x00100800 0x0 0x100>, /* MIX */
172 cell-index = <1>;
174 local-mac-address = [ 00 00 00 00 00 00 ];
175 phy-handle = <&phy1>;
181 phy-handle = <&phy2>;
182 cavium,alt-phy-handle = <&phy100>;
183 rx-delay = <0>;
184 tx-delay = <0>;
185 fixed-link {
187 full-duplex;
191 phy-handle = <&phy3>;
192 cavium,alt-phy-handle = <&phy101>;
193 rx-delay = <0>;
194 tx-delay = <0>;
195 fixed-link {
197 full-duplex;
201 phy-handle = <&phy4>;
202 cavium,alt-phy-handle = <&phy102>;
203 rx-delay = <0>;
204 tx-delay = <0>;
207 compatible = "cavium,octeon-3860-pip-port";
208 reg = <0x3>; /* Port */
209 local-mac-address = [ 00 00 00 00 00 00 ];
210 phy-handle = <&phy5>;
211 cavium,alt-phy-handle = <&phy103>;
214 compatible = "cavium,octeon-3860-pip-port";
215 reg = <0x4>; /* Port */
216 local-mac-address = [ 00 00 00 00 00 00 ];
219 compatible = "cavium,octeon-3860-pip-port";
220 reg = <0x5>; /* Port */
221 local-mac-address = [ 00 00 00 00 00 00 ];
224 compatible = "cavium,octeon-3860-pip-port";
225 reg = <0x6>; /* Port */
226 local-mac-address = [ 00 00 00 00 00 00 ];
229 compatible = "cavium,octeon-3860-pip-port";
230 reg = <0x7>; /* Port */
231 local-mac-address = [ 00 00 00 00 00 00 ];
234 compatible = "cavium,octeon-3860-pip-port";
235 reg = <0x8>; /* Port */
236 local-mac-address = [ 00 00 00 00 00 00 ];
239 compatible = "cavium,octeon-3860-pip-port";
240 reg = <0x9>; /* Port */
241 local-mac-address = [ 00 00 00 00 00 00 ];
244 compatible = "cavium,octeon-3860-pip-port";
245 reg = <0xa>; /* Port */
246 local-mac-address = [ 00 00 00 00 00 00 ];
249 compatible = "cavium,octeon-3860-pip-port";
250 reg = <0xb>; /* Port */
251 local-mac-address = [ 00 00 00 00 00 00 ];
254 compatible = "cavium,octeon-3860-pip-port";
255 reg = <0xc>; /* Port */
256 local-mac-address = [ 00 00 00 00 00 00 ];
259 compatible = "cavium,octeon-3860-pip-port";
260 reg = <0xd>; /* Port */
261 local-mac-address = [ 00 00 00 00 00 00 ];
264 compatible = "cavium,octeon-3860-pip-port";
265 reg = <0xe>; /* Port */
266 local-mac-address = [ 00 00 00 00 00 00 ];
269 compatible = "cavium,octeon-3860-pip-port";
270 reg = <0xf>; /* Port */
271 local-mac-address = [ 00 00 00 00 00 00 ];
277 compatible = "cavium,octeon-3860-pip-port";
278 reg = <0x0>; /* Port */
279 local-mac-address = [ 00 00 00 00 00 00 ];
280 phy-handle = <&phy6>;
283 compatible = "cavium,octeon-3860-pip-port";
284 reg = <0x1>; /* Port */
285 local-mac-address = [ 00 00 00 00 00 00 ];
286 phy-handle = <&phy7>;
289 compatible = "cavium,octeon-3860-pip-port";
290 reg = <0x2>; /* Port */
291 local-mac-address = [ 00 00 00 00 00 00 ];
292 phy-handle = <&phy8>;
295 compatible = "cavium,octeon-3860-pip-port";
296 reg = <0x3>; /* Port */
297 local-mac-address = [ 00 00 00 00 00 00 ];
298 phy-handle = <&phy9>;
306 reg = <0x68>;
310 reg = <0x4c>;
315 #address-cells = <1>;
316 #size-cells = <0>;
317 compatible = "cavium,octeon-3860-twsi";
318 reg = <0x11800 0x00001200 0x0 0x200>;
320 clock-frequency = <100000>;
324 compatible = "cavium,octeon-3860-uart","ns16550";
325 reg = <0x11800 0x00000c00 0x0 0x400>;
326 clock-frequency = <0>;
327 current-speed = <115200>;
328 reg-shift = <3>;
333 compatible = "cavium,octeon-3860-uart","ns16550";
334 reg = <0x11800 0x00000400 0x0 0x400>;
335 clock-frequency = <0>;
336 current-speed = <115200>;
337 reg-shift = <3>;
342 led0: led-display@4,0 {
343 compatible = "avago,hdsp-253x";
344 reg = <4 0x20 0x20>, <4 0 0x20>;
347 cf0: compact-flash@5,0 {
348 compatible = "cavium,ebt3000-compact-flash";
349 reg = <5 0 0x10000>, <6 0 0x10000>;
350 cavium,bus-width = <16>;
351 cavium,true-ide;
352 cavium,dma-engine-handle = <&dma0>;
357 compatible = "cavium,octeon-6335-uctl";
358 reg = <0x11800 0x6f000000 0x0 0x100>;
360 #address-cells = <2>;
361 #size-cells = <2>;
363 refclk-frequency = <12000000>;
365 refclk-type = "crystal";
368 compatible = "cavium,octeon-6335-ehci","usb-ehci";
369 reg = <0x16f00 0x00000000 0x0 0x100>;
371 big-endian-regs;
374 compatible = "cavium,octeon-6335-ohci","usb-ohci";
375 reg = <0x16f00 0x00000400 0x0 0x100>;
377 big-endian-regs;
383 refclk-frequency = <12000000>;
385 refclk-type = "crystal";