Lines Matching +full:fixed +full:- +full:rate
23 unsigned int rate; member
33 if (clk->set && (clk->usage++) == 0) in clk_enable_unlocked()
34 clk->set(clk, 1); in clk_enable_unlocked()
39 if (clk->set && (--clk->usage) == 0) in clk_disable_unlocked()
40 clk->set(clk, 0); in clk_disable_unlocked()
92 if (clk->id == 0) in enetx_set()
355 .rate = (50 * 1000 * 1000),
403 return clk->rate; in clk_get_rate()
408 int clk_set_rate(struct clk *clk, unsigned long rate) in clk_set_rate() argument
414 long clk_round_rate(struct clk *clk, unsigned long rate) in clk_round_rate() argument
421 /* fixed rate clocks */
438 /* fixed rate clocks */
442 CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
452 /* fixed rate clocks */
466 /* fixed rate clocks */
480 /* fixed rate clocks */
495 /* fixed rate clocks */
514 /* fixed rate clocks */
518 CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
530 /* fixed rate clocks */
553 clk_hsspi_pll.rate = HSSPI_PLL_HZ_6328; in bcm63xx_clk_init()
569 clk_hsspi_pll.rate = HSSPI_PLL_HZ_6362; in bcm63xx_clk_init()