Lines Matching +full:4 +full:- +full:16
2 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2008-2009 PetaLogix
4 * Copyright (C) 2008 Jim Law - Iris LP All rights reserved.
21 * Input : Operand1 in Reg r5 - destination address
22 * Operand2 in Reg r6 - source address
23 * Operand3 in Reg r7 - number of bytes to transfer
24 * Output: Result in Reg r3 - starting destinaition address
43 addi r4, r0, 4 /* n = 4 */
44 cmpu r4, r4, r7 /* n = c - n (unsigned) */
51 /* n = 4 - n (yields 3, 2, 1 transfers for 1, 2, 3 addr offset) */
52 rsubi r4, r4, 4
53 rsub r7, r4, r7 /* c = c - n adjust c */
63 addi r4, r4, -1 /* n-- (IN DELAY SLOT) */
67 cmpu r4, r4, r7 /* n = c - n (unsigned) */
73 rsub r7, r4, r7 /* c = c - n */
81 lwi r10, r6, 4 /* t2 = *(s + 4) */
85 swi r10, r5, 4 /* *(d + 4) = t2 */
88 lwi r9, r6, 16 /* t1 = *(s + 16) */
92 swi r9, r5, 16 /* *(d + 16) = t1 */
97 addi r4, r4, -32 /* n = n - 32 */
107 addi r9, r9, -1
109 addi r9, r9, -1
115 lwi r12, r8, 4 /* v = *(as + 4) */
123 swi r9, r5, 4 /* *(d + 4) = t1 */
130 lwi r12, r8, 16 /* v = *(as + 16) */
138 swi r9, r5, 16 /* *(d + 16) = t1 */
156 addi r4, r4, -32 /* n = n - 32 */
164 lwi r12, r8, 4 /* v = *(as + 4) */
172 swi r9, r5, 4 /* *(d + 4) = t1 */
179 lwi r12, r8, 16 /* v = *(as + 16) */
187 swi r9, r5, 16 /* *(d + 16) = t1 */
205 addi r4, r4, -32 /* n = n - 32 */
211 bslli r11, r11, 16 /* h = h << 16 */
213 lwi r12, r8, 4 /* v = *(as + 4) */
214 bsrli r9, r12, 16 /* t1 = v >> 16 */
217 bslli r11, r12, 16 /* h = v << 16 */
219 bsrli r9, r12, 16 /* t1 = v >> 16 */
221 swi r9, r5, 4 /* *(d + 4) = t1 */
222 bslli r11, r12, 16 /* h = v << 16 */
224 bsrli r9, r12, 16 /* t1 = v >> 16 */
227 bslli r11, r12, 16 /* h = v << 16 */
228 lwi r12, r8, 16 /* v = *(as + 16) */
229 bsrli r9, r12, 16 /* t1 = v >> 16 */
232 bslli r11, r12, 16 /* h = v << 16 */
234 bsrli r9, r12, 16 /* t1 = v >> 16 */
236 swi r9, r5, 16 /* *(d + 16) = t1 */
237 bslli r11, r12, 16 /* h = v << 16 */
239 bsrli r9, r12, 16 /* t1 = v >> 16 */
242 bslli r11, r12, 16 /* h = v << 16 */
244 bsrli r9, r12, 16 /* t1 = v >> 16 */
247 bslli r11, r12, 16 /* h = v << 16 */
249 bsrli r9, r12, 16 /* t1 = v >> 16 */
252 bslli r11, r12, 16 /* h = v << 16 */
254 addi r4, r4, -32 /* n = n - 32 */
259 addi r4, r0, 4 /* n = 4 */
260 cmpu r4, r4, r7 /* n = c - n (unsigned) */
274 addi r4, r4,-4 /* n-- */
276 addi r10, r10, 4 /* offset++ (IN DELAY SLOT) */
283 addi r8, r8, 4 /* as = as + 4 */
285 addi r9, r9, -1
287 addi r9, r9, -1
298 addi r4, r4,-4 /* n = n - 4 */
300 addi r10, r10, 4 /* offset = ofset + 4 (IN DELAY SLOT) */
312 addi r4, r4,-4 /* n = n - 4 */
314 addi r10, r10, 4 /* offset = ofset + 4 (IN DELAY SLOT) */
319 bslli r11, r11, 16 /* h = h << 16 */
322 bsrli r9, r12, 16 /* t1 = v >> 16 */
325 bslli r11, r12, 16 /* h = v << 16 */
326 addi r4, r4,-4 /* n = n - 4 */
328 addi r10, r10, 4 /* offset = ofset + 4 (IN DELAY SLOT) */
333 rsub r7, r10, r7 /* c = c - offset */
341 addi r7, r7, -1 /* c-- */
349 .size memcpy, . - memcpy
351 /*----------------------------------------------------------------------------*/
357 cmpu r4, r5, r6 /* n = s - d */
367 addi r4, r0, 4 /* n = 4 */
368 cmpu r4, r4, r7 /* n = c - n (unsigned) */
375 rsub r7, r4, r7 /* c = c - n adjust c */
380 addi r6, r6, -1 /* s-- */
381 addi r5, r5, -1 /* d-- */
385 addi r4, r4, -1 /* n-- (IN DELAY SLOT) */
389 cmpu r4, r4, r7 /* n = c - n (unsigned) */
395 rsub r7, r4, r7 /* c = c - n */
402 addi r6, r6, -32 /* s = s - 32 */
403 addi r5, r5, -32 /* d = d - 32 */
407 lwi r12, r6, 16 /* t4 = *(s + 16) */
411 swi r12, r5, 16 /* *(d + 16) = t4 */
414 lwi r11, r6, 4 /* t3 = *(s + 4) */
418 swi r11, r5, 4 /* *(d + 4) = t3 */
419 addi r4, r4, -32 /* n = n - 32 */
426 rsub r6, r4, r6 /* s = s - n */
429 addi r9, r9, -1
431 addi r9, r9, -1
437 addi r8, r8, -32 /* as = as - 32 */
438 addi r5, r5, -32 /* d = d - 32 */
454 lwi r12, r8, 16 /* v = *(as + 16) */
457 swi r9, r5, 16 /* *(d + 16) = t1 */
469 lwi r12, r8, 4 /* v = *(as + 4) */
472 swi r9, r5, 4 /* *(d + 4) = t1 */
478 addi r4, r4, -32 /* n = n - 32 */
486 addi r8, r8, -32 /* as = as - 32 */
487 addi r5, r5, -32 /* d = d - 32 */
503 lwi r12, r8, 16 /* v = *(as + 16) */
506 swi r9, r5, 16 /* *(d + 16) = t1 */
518 lwi r12, r8, 4 /* v = *(as + 4) */
521 swi r9, r5, 4 /* *(d + 4) = t1 */
527 addi r4, r4, -32 /* n = n - 32 */
533 bsrli r11, r11, 16 /* h = h >> 16 */
535 addi r8, r8, -32 /* as = as - 32 */
536 addi r5, r5, -32 /* d = d - 32 */
538 bslli r9, r12, 16 /* t1 = v << 16 */
541 bsrli r11, r12, 16 /* h = v >> 16 */
543 bslli r9, r12, 16 /* t1 = v << 16 */
546 bsrli r11, r12, 16 /* h = v >> 16 */
548 bslli r9, r12, 16 /* t1 = v << 16 */
551 bsrli r11, r12, 16 /* h = v >> 16 */
552 lwi r12, r8, 16 /* v = *(as + 16) */
553 bslli r9, r12, 16 /* t1 = v << 16 */
555 swi r9, r5, 16 /* *(d + 16) = t1 */
556 bsrli r11, r12, 16 /* h = v >> 16 */
558 bslli r9, r12, 16 /* t1 = v << 16 */
561 bsrli r11, r12, 16 /* h = v >> 16 */
563 bslli r9, r12, 16 /* t1 = v << 16 */
566 bsrli r11, r12, 16 /* h = v >> 16 */
567 lwi r12, r8, 4 /* v = *(as + 4) */
568 bslli r9, r12, 16 /* t1 = v << 16 */
570 swi r9, r5, 4 /* *(d + 4) = t1 */
571 bsrli r11, r12, 16 /* h = v >> 16 */
573 bslli r9, r12, 16 /* t1 = v << 16 */
576 addi r4, r4, -32 /* n = n - 32 */
578 bsrli r11, r12, 16 /* h = v >> 16 (IN DELAY SLOT) */
581 addi r4, r0, 4 /* n = 4 */
582 cmpu r4, r4, r7 /* n = c - n (unsigned) */
587 rsub r5, r4, r5 /* d = d - n */
588 rsub r6, r4, r6 /* s = s - n */
589 rsub r7, r4, r7 /* c = c - n */
596 addi r4, r4,-4 /* n-- */
607 addi r9, r9, -1
609 addi r9, r9, -1
615 addi r4, r4,-4 /* n = n - 4 */
628 addi r4, r4,-4 /* n = n - 4 */
639 bsrli r11, r11, 16 /* h = h >> 16 */
641 addi r4, r4,-4 /* n = n - 4 */
643 bslli r9, r12, 16 /* t1 = v << 16 */
647 bsrli r11, r12, 16 /* h = v >> 16 (IN DELAY SLOT) */
654 addi r6, r6, -1 /* s-- */
656 addi r5, r5, -1 /* d-- */
659 addi r7, r7, -1 /* c-- (IN DELAY SLOT) */
665 .size memmove, . - memmove