microblaze/kernel/hw_exception_handler.S

90 		lwi	r6, r1, PT_R6;		\
323 	swi	r6, r1, PT_R6
340 	addk	r6, r5, r5; /* << 1 */
341 	addk	r6, r6, r6; /* << 2 */
348 	lwi	r5, r6, TOPHYS(exception_debug_table)
350 	swi	r5, r6, TOPHYS(exception_debug_table)
354 	lwi	r6, r6, TOPHYS(_MB_HW_ExceptionVectorTable)
355 	bra	r6
373 	andi	r6, r4, 0x1000			/* Check ESR[DS] */
374 	beqi	r6, _no_delayslot		/* Branch if ESR[DS] not set */
382 	andi	r6, r4, 0x3E0; /* Mask and extract the register operand */
383 	srl	r6, r6; /* r6 >> 5 */
384 	srl	r6, r6;
385 	srl	r6, r6;
386 	srl	r6, r6;
387 	srl	r6, r6;
389 	sbi	r6, r0, TOPHYS(ex_reg_op);
391 	andi	r6, r4, 0x400; /* Extract ESR[S] */
392 	bnei	r6, ex_sw;
394 	andi	r6, r4, 0x800; /* Extract ESR[W] */
395 	beqi	r6, ex_lhw;
422 	addik	r6, r0, TOPHYS(lw_table);
426 	addk	r5, r5, r6;
433 	addik	r6, r0, TOPHYS(sw_table);
437 	add	r5, r5, r6;
440 	mfs	r6, resr;
442 	andi	r6, r6, 0x800; /* Extract ESR[W] */
443 	beqi	r6, ex_shw;
529 		bsrli	r6, r3, PTE_SHIFT /* Compute PTE address */
530 		andi	r6, r6, PAGE_SIZE - 4
531 		or	r5, r5, r6
534 		andi	r6, r4, _PAGE_RW	/* Is it writeable? */
535 		beqi	r6, ex2			/* Bail if not */
605 		ori	r6, r0, CONFIG_KERNEL_START
606 		cmpu	r4, r3, r6
630 		bsrli	r6, r3, PTE_SHIFT /* Compute PTE address */
631 		andi	r6, r6, PAGE_SIZE - 4
632 		or	r5, r5, r6
635 		andi	r6, r4, _PAGE_PRESENT
636 		beqi	r6, ex7
701 		bsrli	r6, r3, PTE_SHIFT /* Compute PTE address */
702 		andi	r6, r6, PAGE_SIZE - 4
703 		or	r5, r5, r6
706 		andi	r6, r4, _PAGE_PRESENT
707 		beqi	r6, ex10
757 		ori	r6, r0, 1
758 		cmp	r31, r5, r6
831 	andi	r6, r3, 0x400;	/* Extract ESR[S] */
832 	bneid	r6, ex_sw_vm;
833 	andi	r6, r3, 0x800;	/* Extract ESR[W] - delay slot */
835 	beqid	r6, ex_lhw_vm;
838 	addik	r6, r0, ex_tmp_data_loc_0;
839 	sbi	r5, r6, 0;
841 	sbi	r5, r6, 1;
843 	sbi	r5, r6, 2;
845 	sbi	r5, r6, 3;
848 	lwi	r3, r6, 0;
852 	addik	r6, r0, ex_tmp_data_loc_0;
853 	sbi	r5, r6, 0;
855 	sbi	r5, r6, 1;
856 	lhui	r3, r6, 0;	/* Get the destination register value into r3 */
869 	beqid	r6, ex_shw_vm;
905 	lwi	r6, r7, PT_PC; /* faulting address is one instruction above */
906 	addik	r6, r6, -4 /* for finding proper fixup */
907 	swi	r6, r7, PT_PC; /* a save back it to PT_PC */