include/asm/mac_psc.h

1 /* SPDX-License-Identifier: GPL-2.0 */
5  * The PSC is used on the AV Macs to control IO functions not handled
9  * The first seven DMA channels appear to be "one-shot" and are actually
10  * sets of two channels; one member is active while the other is being
12  * The one-shot channels are grouped together and are:
23  * to be closely tied and share one set of registers. They also seem to run
25  * not understood as there seems to be only one input and one output buffer
30  * machine with easy-to-find patterns and looking for them in the DMA
34  * 1999-05-25 (jmt)
42  * set only seems to handle four interrupts instead of seven.
44  * To access a particular set of registers, add 0xn0 to the base
52  * One-shot DMA control registers
69  * You're supposed to use one channel while the other runs and
103  * Free-running DMA registers. The only part known for sure are the bits in
107  * These registers seem to be mirrored every thirty-two bytes up until offset
108  * 0x300. It's safe to assume then that a new set of registers starts there.
112 				 * [ 16-bit ]
117 				 * bit 2  : Set to one to enable sound
122 				 * bit 6  : Set to one to enable pass-thru
124 				 *          seems to appear in both the input
126 				 * bit 7  : Set to one to activate the
127 				 *          sound input DMA or zero to
129 				 * bit 8  : Set to one to activate the
130 				 *          sound output DMA or zero to
135 				 *          rate. Usually set to binary 10 and
141 				 * Setting this to 0x0000 is a good way to
148  * 0x0202 - 0x0203 is unused. Writing there
149  * seems to clobber the control register.
153 				 * [ 32-bit ]
156 				 * bits 12-15 : input source volume, 0 - F
157 				 * bits 16-19 : unknown, always 0x5
158 				 * bits 20-23 : input source selection:
167 				 * [ 32-bit ]
168 				 * Appears to be a read-only status register.
172 				 * [ 16-bit ]
173 				 * Unknown 16-bit value, always 0x0000.
176 				 * [ 16-bit ]
177 				 * Counts down to zero from some constant
178 				 * value. The value appears to be the
185 				 * [ 32-bit ]
189 				 * [ 32-bit ]
193 				 * [ 16-bit ]
194 				 * Length of both buffers in eight-byte units.
197 				 * [ 16-bit ]
201 				 * [ 16-bit ]
202 				 * Appears to e a read-only status register.
206 				 * [ 16-bit ]