m68k/coldfire/intc-5272.c

2  * intc.c  --  interrupt controller or ColdFire 5272 SoC
24  * ColdFire interrupt controller - it truly is completely different.
34  * Note that the external interrupts are edge triggered (unlike the
35  * internal interrupt sources which are level triggered). Which means
44 static struct irqmap intc_irqmap[MCFINT_VECMAX - MCFINT_VECBASE] = {
83 	unsigned int irq = d->irq;  in intc_irq_mask()
87 		irq -= MCFINT_VECBASE;  in intc_irq_mask()
95 	unsigned int irq = d->irq;  in intc_irq_unmask()
99 		irq -= MCFINT_VECBASE;  in intc_irq_unmask()
107 	unsigned int irq = d->irq;  in intc_irq_ack()
111 		irq -= MCFINT_VECBASE;  in intc_irq_ack()
124 	unsigned int irq = d->irq;  in intc_irq_set_type()
127 		irq -= MCFINT_VECBASE;  in intc_irq_set_type()
132 				v &= ~(0x1 << (32 - irq));  in intc_irq_set_type()
134 				v |= (0x1 << (32 - irq));  in intc_irq_set_type()
142  * Simple flow handler to deal with the external edge triggered interrupts.
148 	irq_desc_get_chip(desc)->irq_ack(&desc->irq_data);  in intc_external_irq()
153 	.name		= "CF-INTC",
163 	int irq, edge;  in init_IRQ()  local
173 		edge = 0;  in init_IRQ()
175 			edge = intc_irqmap[irq - MCFINT_VECBASE].ack;  in init_IRQ()
176 		if (edge) {  in init_IRQ()