Lines Matching +full:in +full:- +full:built
1 # SPDX-License-Identifier: GPL-2.0
236 # MIPS Loongson code, to preserve Loongson-specific code paths in drivers that
267 def_bool $(as-instr,x:pcalau12i \$t0$(comma)%pc_hi20(x))
270 def_bool $(as-instr,movfcsr2gr \$t0$(comma)\$fcsr0)
273 def_bool $(cc-option,-Wa$(comma)-mthin-add-sub) || AS_IS_LLVM
276 def_bool $(as-instr,vld \$vr0$(comma)\$a0$(comma)0)
279 def_bool $(as-instr,xvld \$xr0$(comma)\$a0$(comma)0)
282 def_bool $(as-instr,movscr2gr \$a0$(comma)\$scr0)
285 def_bool $(as-instr,hvcl 0)
351 string "Built-in kernel command line"
354 are provided at run-time, during boot. However, there are cases
358 When that occurs, it is possible to define a built-in command
365 Choose how the kernel will handle the provided built-in command
371 Prefer the command-line passed by the boot loader if available.
372 Use the built-in command line as fallback in case we get nothing
376 bool "Use built-in to extend bootloader kernel arguments"
378 The command-line arguments provided during boot will be
379 appended to the built-in command line. This is useful in
384 bool "Always use the built-in kernel command string"
386 Always use the built-in command line, even if we get one during
387 boot. This is useful in case you need to override the provided
394 bool "Enable built-in dtb in kernel"
398 the kernel at boot time. Let's provide a device tree table in the
401 Built-in DTBs are generic enough and can be used as references.
404 string "Source file for built-in dtb"
442 threads in one physical core.
445 bool "Multi-Processing support"
451 If you say N here, the kernel will run on uni- and multiprocessor
457 See also the SMP-HOWTO available at <http://www.tldp.org/docs.html#howto>.
462 bool "Support for hot-pluggable CPUs"
473 int "Maximum number of CPUs (2-256)"
485 Say Y to compile the kernel with NUMA (Non-Uniform Memory Access)
504 keeps in the memory allocator. If you need to allocate very large
508 The page size is not necessarily 4KB. Keep this in mind
512 bool "Enable LoongArch DMW-based ioremap()"
514 We use generic TLB-based ioremap() by default since it has page
515 protection support. However, you can enable LoongArch DMW-based
521 LoongArch maintains cache coherency in hardware, but when paired
522 with LS7A chipsets the WUC attribute (Weak-ordered UnCached, which
525 may be fixed in newer chipsets).
527 This means WUC can only used for write-only memory regions now, so
535 bool "Enable -mstrict-align to prevent unaligned accesses" if EXPERT
539 -mstrict-align build parameter to prevent unaligned accesses.
542 Loongson-2K2000/2K3000/3A5000/3C5000/3D5000.
545 Loongson-2K500/2K1000.
549 to run kernel only on systems with h/w unaligned access support in
648 amount of physical RAM available in the target system.
668 accounting. Time spent executing other tasks in parallel with
672 If in doubt, say N here.
688 for architectures which are either NUMA (Non-Uniform Memory Access)
689 or have huge holes in the physical address space for other reasons.