Lines Matching +full:4 +full:kb +full:- +full:page

1 # SPDX-License-Identifier: GPL-2.0
236 # MIPS Loongson code, to preserve Loongson-specific code paths in drivers that
260 default 4 if PGTABLE_4LEVEL
267 def_bool $(as-instr,x:pcalau12i \$t0$(comma)%pc_hi20(x))
270 def_bool $(as-instr,movfcsr2gr \$t0$(comma)\$fcsr0)
273 def_bool $(cc-option,-Wa$(comma)-mthin-add-sub) || AS_IS_LLVM
276 def_bool $(as-instr,vld \$vr0$(comma)\$a0$(comma)0)
279 def_bool $(as-instr,xvld \$xr0$(comma)\$a0$(comma)0)
282 def_bool $(as-instr,movscr2gr \$a0$(comma)\$scr0)
285 def_bool $(as-instr,hvcl 0)
292 prompt "Page Table Layout"
296 Allows choosing the page table layout, which is a combination
297 of page size and page table levels. The size of virtual memory
298 address space are determined by the page table layout.
300 config 4KB_3LEVEL
301 bool "4KB with 3 levels"
305 This option selects 4KB page size with 3 level page tables, which
308 config 4KB_4LEVEL
309 bool "4KB with 4 levels"
313 This option selects 4KB page size with 4 level page tables, which
317 bool "16KB with 2 levels"
321 This option selects 16KB page size with 2 level page tables, which
325 bool "16KB with 3 levels"
329 This option selects 16KB page size with 3 level page tables, which
333 bool "64KB with 2 levels"
337 This option selects 64KB page size with 2 level page tables, which
341 bool "64KB with 3 levels"
345 This option selects 64KB page size with 3 level page tables, which
351 string "Built-in kernel command line"
354 are provided at run-time, during boot. However, there are cases
358 When that occurs, it is possible to define a built-in command
365 Choose how the kernel will handle the provided built-in command
371 Prefer the command-line passed by the boot loader if available.
372 Use the built-in command line as fallback in case we get nothing
376 bool "Use built-in to extend bootloader kernel arguments"
378 The command-line arguments provided during boot will be
379 appended to the built-in command line. This is useful in
384 bool "Always use the built-in kernel command string"
386 Always use the built-in command line, even if we get one during
394 bool "Enable built-in dtb in kernel"
401 Built-in DTBs are generic enough and can be used as references.
404 string "Source file for built-in dtb"
445 bool "Multi-Processing support"
451 If you say N here, the kernel will run on uni- and multiprocessor
457 See also the SMP-HOWTO available at <http://www.tldp.org/docs.html#howto>.
462 bool "Support for hot-pluggable CPUs"
473 int "Maximum number of CPUs (2-256)"
485 Say Y to compile the kernel with NUMA (Non-Uniform Memory Access)
508 The page size is not necessarily 4KB. Keep this in mind
512 bool "Enable LoongArch DMW-based ioremap()"
514 We use generic TLB-based ioremap() by default since it has page
515 protection support. However, you can enable LoongArch DMW-based
522 with LS7A chipsets the WUC attribute (Weak-ordered UnCached, which
527 This means WUC can only used for write-only memory regions now, so
535 bool "Enable -mstrict-align to prevent unaligned accesses" if EXPERT
539 -mstrict-align build parameter to prevent unaligned accesses.
542 Loongson-2K2000/2K3000/3A5000/3C5000/3D5000.
545 Loongson-2K500/2K1000.
589 Loongson Binary Translation (LBT) introduces 4 scratch registers (SCR0
688 for architectures which are either NUMA (Non-Uniform Memory Access)