Lines Matching +full:0 +full:xffc00000

24 #define	__HVM_PDE_S		(0x7 << 0)
25 #define __HVM_PDE_S_4KB		0
35 #define __HVM_PDE_PTMASK_4KB	0xfffff000
36 #define __HVM_PDE_PTMASK_16KB	0xfffffc00
37 #define __HVM_PDE_PTMASK_64KB	0xffffff00
38 #define __HVM_PDE_PTMASK_256KB	0xffffffc0
39 #define __HVM_PDE_PTMASK_1MB	0xfffffff0
46 #define	__HVM_PTE_C		(0x7<<6)
56 #define __HEXAGON_C_WB		0x0	/* Write-back, no L2 */
57 #define	__HEXAGON_C_WT		0x1	/* Write-through, no L2 */
58 #define	__HEXAGON_C_UNC		0x6	/* Uncached memory */
60 #define	__HEXAGON_C_DEV		0x4	/* Device register space */
64 #define	__HEXAGON_C_WT_L2	0x5	/* Write-through, with L2 */
65 #define	__HEXAGON_C_WB_L2	0x7	/* Write-back, with L2 */
76 #define __HVM_PTE_PGMASK_4KB	0xfffff000
77 #define __HVM_PTE_PGMASK_16KB	0xffffc000
78 #define __HVM_PTE_PGMASK_64KB	0xffff0000
79 #define __HVM_PTE_PGMASK_256KB	0xfffc0000
80 #define __HVM_PTE_PGMASK_1MB	0xfff00000
84 #define __HVM_PTE_PGMASK_4MB	0xffc00000
85 #define __HVM_PTE_PGMASK_16MB	0xff000000