Lines Matching refs:regs
10 static inline bool csky_insn_reg_get_val(struct pt_regs *regs, in csky_insn_reg_get_val() argument
15 *ptr = *(®s->a0 + index); in csky_insn_reg_get_val()
18 *ptr = *(®s->exregs[0] + index - 16); in csky_insn_reg_get_val()
22 *ptr = regs->usp; in csky_insn_reg_get_val()
25 *ptr = regs->lr; in csky_insn_reg_get_val()
28 *ptr = regs->tls; in csky_insn_reg_get_val()
39 static inline bool csky_insn_reg_set_val(struct pt_regs *regs, in csky_insn_reg_set_val() argument
44 *(®s->a0 + index) = val; in csky_insn_reg_set_val()
47 *(®s->exregs[0] + index - 16) = val; in csky_insn_reg_set_val()
51 regs->usp = val; in csky_insn_reg_set_val()
54 regs->lr = val; in csky_insn_reg_set_val()
57 regs->tls = val; in csky_insn_reg_set_val()
69 simulate_br16(u32 opcode, long addr, struct pt_regs *regs) in simulate_br16() argument
71 instruction_pointer_set(regs, in simulate_br16()
76 simulate_br32(u32 opcode, long addr, struct pt_regs *regs) in simulate_br32() argument
78 instruction_pointer_set(regs, in simulate_br32()
83 simulate_bt16(u32 opcode, long addr, struct pt_regs *regs) in simulate_bt16() argument
85 if (regs->sr & 1) in simulate_bt16()
86 instruction_pointer_set(regs, in simulate_bt16()
89 instruction_pointer_set(regs, addr + 2); in simulate_bt16()
93 simulate_bt32(u32 opcode, long addr, struct pt_regs *regs) in simulate_bt32() argument
95 if (regs->sr & 1) in simulate_bt32()
96 instruction_pointer_set(regs, in simulate_bt32()
99 instruction_pointer_set(regs, addr + 4); in simulate_bt32()
103 simulate_bf16(u32 opcode, long addr, struct pt_regs *regs) in simulate_bf16() argument
105 if (!(regs->sr & 1)) in simulate_bf16()
106 instruction_pointer_set(regs, in simulate_bf16()
109 instruction_pointer_set(regs, addr + 2); in simulate_bf16()
113 simulate_bf32(u32 opcode, long addr, struct pt_regs *regs) in simulate_bf32() argument
115 if (!(regs->sr & 1)) in simulate_bf32()
116 instruction_pointer_set(regs, in simulate_bf32()
119 instruction_pointer_set(regs, addr + 4); in simulate_bf32()
123 simulate_jmp16(u32 opcode, long addr, struct pt_regs *regs) in simulate_jmp16() argument
127 csky_insn_reg_get_val(regs, tmp, &tmp); in simulate_jmp16()
129 instruction_pointer_set(regs, tmp & 0xfffffffe); in simulate_jmp16()
133 simulate_jmp32(u32 opcode, long addr, struct pt_regs *regs) in simulate_jmp32() argument
137 csky_insn_reg_get_val(regs, tmp, &tmp); in simulate_jmp32()
139 instruction_pointer_set(regs, tmp & 0xfffffffe); in simulate_jmp32()
143 simulate_jsr16(u32 opcode, long addr, struct pt_regs *regs) in simulate_jsr16() argument
147 csky_insn_reg_get_val(regs, tmp, &tmp); in simulate_jsr16()
149 regs->lr = addr + 2; in simulate_jsr16()
151 instruction_pointer_set(regs, tmp & 0xfffffffe); in simulate_jsr16()
155 simulate_jsr32(u32 opcode, long addr, struct pt_regs *regs) in simulate_jsr32() argument
159 csky_insn_reg_get_val(regs, tmp, &tmp); in simulate_jsr32()
161 regs->lr = addr + 4; in simulate_jsr32()
163 instruction_pointer_set(regs, tmp & 0xfffffffe); in simulate_jsr32()
167 simulate_lrw16(u32 opcode, long addr, struct pt_regs *regs) in simulate_lrw16() argument
175 val = *(unsigned int *)(instruction_pointer(regs) + offset); in simulate_lrw16()
177 csky_insn_reg_set_val(regs, tmp, val); in simulate_lrw16()
181 simulate_lrw32(u32 opcode, long addr, struct pt_regs *regs) in simulate_lrw32() argument
188 ((instruction_pointer(regs) + offset) & 0xfffffffc); in simulate_lrw32()
190 csky_insn_reg_set_val(regs, tmp, val); in simulate_lrw32()
194 simulate_pop16(u32 opcode, long addr, struct pt_regs *regs) in simulate_pop16() argument
196 unsigned long *tmp = (unsigned long *)regs->usp; in simulate_pop16()
200 csky_insn_reg_set_val(regs, i + 4, *tmp); in simulate_pop16()
205 csky_insn_reg_set_val(regs, 15, *tmp); in simulate_pop16()
209 regs->usp = (unsigned long)tmp; in simulate_pop16()
211 instruction_pointer_set(regs, regs->lr); in simulate_pop16()
215 simulate_pop32(u32 opcode, long addr, struct pt_regs *regs) in simulate_pop32() argument
217 unsigned long *tmp = (unsigned long *)regs->usp; in simulate_pop32()
221 csky_insn_reg_set_val(regs, i + 4, *tmp); in simulate_pop32()
226 csky_insn_reg_set_val(regs, 15, *tmp); in simulate_pop32()
231 csky_insn_reg_set_val(regs, i + 16, *tmp); in simulate_pop32()
236 csky_insn_reg_set_val(regs, 29, *tmp); in simulate_pop32()
240 regs->usp = (unsigned long)tmp; in simulate_pop32()
242 instruction_pointer_set(regs, regs->lr); in simulate_pop32()
246 simulate_bez32(u32 opcode, long addr, struct pt_regs *regs) in simulate_bez32() argument
250 csky_insn_reg_get_val(regs, tmp, &tmp); in simulate_bez32()
253 instruction_pointer_set(regs, in simulate_bez32()
256 instruction_pointer_set(regs, addr + 4); in simulate_bez32()
260 simulate_bnez32(u32 opcode, long addr, struct pt_regs *regs) in simulate_bnez32() argument
264 csky_insn_reg_get_val(regs, tmp, &tmp); in simulate_bnez32()
267 instruction_pointer_set(regs, in simulate_bnez32()
270 instruction_pointer_set(regs, addr + 4); in simulate_bnez32()
274 simulate_bnezad32(u32 opcode, long addr, struct pt_regs *regs) in simulate_bnezad32() argument
279 csky_insn_reg_get_val(regs, tmp, (unsigned long *)&val); in simulate_bnezad32()
284 instruction_pointer_set(regs, in simulate_bnezad32()
287 instruction_pointer_set(regs, addr + 4); in simulate_bnezad32()
289 csky_insn_reg_set_val(regs, tmp, (unsigned long)val); in simulate_bnezad32()
293 simulate_bhsz32(u32 opcode, long addr, struct pt_regs *regs) in simulate_bhsz32() argument
298 csky_insn_reg_get_val(regs, tmp, &val); in simulate_bhsz32()
301 instruction_pointer_set(regs, in simulate_bhsz32()
304 instruction_pointer_set(regs, addr + 4); in simulate_bhsz32()
308 simulate_bhz32(u32 opcode, long addr, struct pt_regs *regs) in simulate_bhz32() argument
313 csky_insn_reg_get_val(regs, tmp, &val); in simulate_bhz32()
316 instruction_pointer_set(regs, in simulate_bhz32()
319 instruction_pointer_set(regs, addr + 4); in simulate_bhz32()
323 simulate_blsz32(u32 opcode, long addr, struct pt_regs *regs) in simulate_blsz32() argument
328 csky_insn_reg_get_val(regs, tmp, &val); in simulate_blsz32()
331 instruction_pointer_set(regs, in simulate_blsz32()
334 instruction_pointer_set(regs, addr + 4); in simulate_blsz32()
338 simulate_blz32(u32 opcode, long addr, struct pt_regs *regs) in simulate_blz32() argument
343 csky_insn_reg_get_val(regs, tmp, &val); in simulate_blz32()
346 instruction_pointer_set(regs, in simulate_blz32()
349 instruction_pointer_set(regs, addr + 4); in simulate_blz32()
353 simulate_bsr32(u32 opcode, long addr, struct pt_regs *regs) in simulate_bsr32() argument
360 instruction_pointer_set(regs, in simulate_bsr32()
363 regs->lr = addr + 4; in simulate_bsr32()
367 simulate_jmpi32(u32 opcode, long addr, struct pt_regs *regs) in simulate_jmpi32() argument
373 ((instruction_pointer(regs) + offset) & 0xfffffffc); in simulate_jmpi32()
375 instruction_pointer_set(regs, val); in simulate_jmpi32()
379 simulate_jsri32(u32 opcode, long addr, struct pt_regs *regs) in simulate_jsri32() argument
385 ((instruction_pointer(regs) + offset) & 0xfffffffc); in simulate_jsri32()
387 regs->lr = addr + 4; in simulate_jsri32()
389 instruction_pointer_set(regs, val); in simulate_jsri32()