Lines Matching refs:Op2
467 switch (p->Op2) { in access_gic_sgi()
999 pmceid = kvm_pmu_get_pmceid(vcpu, (p->Op2 & 1)); in access_pmceid()
1027 if (r->CRn == 9 && r->CRm == 13 && r->Op2 == 0) in get_pmu_evcntr()
1032 idx = ((r->CRm & 3) << 3) | (r->Op2 & 7); in get_pmu_evcntr()
1045 if (r->Op2 == 2) { in access_pmu_evcntr()
1052 } else if (r->Op2 == 0) { in access_pmu_evcntr()
1070 idx = ((r->CRm & 3) << 3) | (r->Op2 & 7); in access_pmu_evcntr()
1099 if (r->CRn == 9 && r->CRm == 13 && r->Op2 == 1) { in access_pmu_evtyper()
1104 idx = ((r->CRm & 3) << 3) | (r->Op2 & 7); in access_pmu_evtyper()
1140 set = r->Op2 & 1; in set_pmreg()
1171 if (r->Op2 & 0x1) { in access_pmcnten()
1199 if (r->Op2 & 0x1) in access_pminten()
2159 Op0(3), Op1(0), CRn(0), CRm(crm), Op2(op2), \
2878 u32 op = sys_insn(p->Op0, p->Op1, p->CRn, p->CRm, p->Op2); in handle_at_s1e01()
2888 u32 op = sys_insn(p->Op0, p->Op1, p->CRn, p->CRm, p->Op2); in handle_at_s1e2()
2905 u32 op = sys_insn(p->Op0, p->Op1, p->CRn, p->CRm, p->Op2); in handle_at_s12()
2931 u32 sys_encoding = sys_insn(p->Op0, p->Op1, p->CRn, p->CRm, p->Op2); in handle_alle1is()
2953 u8 Op2 = sys_reg_Op2(instr); in kvm_supported_tlbi_ipas2_op() local
2959 if (CRm == TLBI_CRm_IPAIS && (Op2 == 2 || Op2 == 6) && in kvm_supported_tlbi_ipas2_op()
2963 if (CRm == TLBI_CRm_IPAONS && (Op2 == 0 || Op2 == 4) && in kvm_supported_tlbi_ipas2_op()
2967 if (CRm == TLBI_CRm_IPAONS && (Op2 == 3 || Op2 == 7) && in kvm_supported_tlbi_ipas2_op()
3023 u32 sys_encoding = sys_insn(p->Op0, p->Op1, p->CRn, p->CRm, p->Op2); in handle_vmalls12e1is()
3047 u32 sys_encoding = sys_insn(p->Op0, p->Op1, p->CRn, p->CRm, p->Op2); in handle_ripas2e1is()
3122 u32 sys_encoding = sys_insn(p->Op0, p->Op1, p->CRn, p->CRm, p->Op2); in handle_ipas2e1is()
3148 u32 sys_encoding = sys_insn(p->Op0, p->Op1, p->CRn, p->CRm, p->Op2); in handle_tlbi_el1()
3385 { AA32(LO), Op1( 0), CRn( 0), CRm((n)), Op2( 4), trap_bvr, NULL, n }, \
3387 { Op1( 0), CRn( 0), CRm((n)), Op2( 5), trap_bcr, NULL, n }, \
3389 { Op1( 0), CRn( 0), CRm((n)), Op2( 6), trap_wvr, NULL, n }, \
3391 { Op1( 0), CRn( 0), CRm((n)), Op2( 7), trap_wcr, NULL, n }
3394 { AA32(HI), Op1( 0), CRn( 1), CRm((n)), Op2( 1), trap_bvr, NULL, n }
3403 { Op1( 0), CRn( 0), CRm( 0), Op2( 0), trap_dbgdidr },
3405 { Op1( 0), CRn( 0), CRm( 0), Op2( 2), trap_raz_wi },
3409 { Op1( 0), CRn( 0), CRm( 1), Op2( 0), trap_raz_wi },
3412 { Op1( 0), CRn( 0), CRm( 2), Op2( 0), trap_debug_regs, NULL, MDCCINT_EL1 },
3414 { Op1( 0), CRn( 0), CRm( 2), Op2( 2), trap_debug_regs, NULL, MDSCR_EL1 },
3417 { Op1( 0), CRn( 0), CRm( 3), Op2( 0), trap_raz_wi },
3419 { Op1( 0), CRn( 0), CRm( 3), Op2( 2), trap_raz_wi },
3424 { Op1( 0), CRn( 0), CRm( 6), Op2( 0), trap_raz_wi },
3426 { Op1( 0), CRn( 0), CRm( 6), Op2( 2), trap_raz_wi },
3429 { Op1( 0), CRn( 0), CRm( 7), Op2( 0), trap_debug_regs, NULL, DBGVCR32_EL2 },
3441 { Op1( 0), CRn( 1), CRm( 0), Op2( 0), trap_raz_wi },
3445 { Op1( 0), CRn( 1), CRm( 0), Op2( 4), trap_oslar_el1 },
3448 { Op1( 0), CRn( 1), CRm( 1), Op2( 4), trap_oslsr_el1, NULL, OSLSR_EL1 },
3452 { Op1( 0), CRn( 1), CRm( 3), Op2( 4), trap_raz_wi },
3455 { Op1( 0), CRn( 1), CRm( 4), Op2( 4), trap_raz_wi },
3469 { Op1( 0), CRn( 2), CRm( 0), Op2( 0), trap_raz_wi },
3472 { Op1( 0), CRn( 7), CRm( 0), Op2( 7), trap_raz_wi },
3474 { Op1( 0), CRn( 7), CRm( 1), Op2( 7), trap_raz_wi },
3476 { Op1( 0), CRn( 7), CRm( 2), Op2( 7), trap_raz_wi },
3478 { Op1( 0), CRn( 7), CRm( 8), Op2( 6), trap_raz_wi },
3480 { Op1( 0), CRn( 7), CRm( 9), Op2( 6), trap_raz_wi },
3482 { Op1( 0), CRn( 7), CRm(14), Op2( 6), trap_dbgauthstatus_el1 },
3496 Op1(_Op1), CRn(_CRn), CRm(_CRm), Op2(_Op2), \
3516 { Op1( 0), CRn( 0), CRm( 0), Op2( 1), access_ctr },
3517 { Op1( 0), CRn( 1), CRm( 0), Op2( 0), access_vm_reg, NULL, SCTLR_EL1 },
3519 { AA32(LO), Op1( 0), CRn( 1), CRm( 0), Op2( 1), access_actlr, NULL, ACTLR_EL1 },
3521 { AA32(HI), Op1( 0), CRn( 1), CRm( 0), Op2( 3), access_actlr, NULL, ACTLR_EL1 },
3522 { Op1( 0), CRn( 2), CRm( 0), Op2( 0), access_vm_reg, NULL, TTBR0_EL1 },
3523 { Op1( 0), CRn( 2), CRm( 0), Op2( 1), access_vm_reg, NULL, TTBR1_EL1 },
3525 { AA32(LO), Op1( 0), CRn( 2), CRm( 0), Op2( 2), access_vm_reg, NULL, TCR_EL1 },
3527 { AA32(HI), Op1( 0), CRn( 2), CRm( 0), Op2( 3), access_vm_reg, NULL, TCR_EL1 },
3528 { Op1( 0), CRn( 3), CRm( 0), Op2( 0), access_vm_reg, NULL, DACR32_EL2 },
3531 { Op1( 0), CRn( 5), CRm( 0), Op2( 0), access_vm_reg, NULL, ESR_EL1 },
3532 { Op1( 0), CRn( 5), CRm( 0), Op2( 1), access_vm_reg, NULL, IFSR32_EL2 },
3534 { Op1( 0), CRn( 5), CRm( 1), Op2( 0), access_vm_reg, NULL, AFSR0_EL1 },
3536 { Op1( 0), CRn( 5), CRm( 1), Op2( 1), access_vm_reg, NULL, AFSR1_EL1 },
3538 { AA32(LO), Op1( 0), CRn( 6), CRm( 0), Op2( 0), access_vm_reg, NULL, FAR_EL1 },
3540 { AA32(HI), Op1( 0), CRn( 6), CRm( 0), Op2( 2), access_vm_reg, NULL, FAR_EL1 },
3545 { Op1( 0), CRn( 7), CRm( 6), Op2( 2), access_dcsw },
3546 { Op1( 0), CRn( 7), CRm(10), Op2( 2), access_dcsw },
3547 { Op1( 0), CRn( 7), CRm(14), Op2( 2), access_dcsw },
3571 { AA32(LO), Op1( 0), CRn(10), CRm( 2), Op2( 0), access_vm_reg, NULL, MAIR_EL1 },
3573 { AA32(HI), Op1( 0), CRn(10), CRm( 2), Op2( 1), access_vm_reg, NULL, MAIR_EL1 },
3575 { AA32(LO), Op1( 0), CRn(10), CRm( 3), Op2( 0), access_vm_reg, NULL, AMAIR_EL1 },
3577 { AA32(HI), Op1( 0), CRn(10), CRm( 3), Op2( 1), access_vm_reg, NULL, AMAIR_EL1 },
3602 { Op1( 0), CRn(13), CRm( 0), Op2( 1), access_vm_reg, NULL, CONTEXTIDR_EL1 },
3675 { Op1(1), CRn( 0), CRm( 0), Op2(0), access_ccsidr },
3676 { Op1(1), CRn( 0), CRm( 0), Op2(1), access_clidr },
3679 { Op1(1), CRn( 0), CRm( 0), Op2(2), undef_access },
3681 { Op1(2), CRn( 0), CRm( 0), Op2(0), access_csselr, NULL, CSSELR_EL1 },
3685 { Op1( 0), CRn( 0), CRm( 2), Op2( 0), access_vm_reg, NULL, TTBR0_EL1 },
3687 { Op1( 0), CRn( 0), CRm(12), Op2( 0), access_gic_sgi }, /* ICC_SGI1R */
3689 { Op1( 1), CRn( 0), CRm( 2), Op2( 0), access_vm_reg, NULL, TTBR1_EL1 },
3690 { Op1( 1), CRn( 0), CRm(12), Op2( 0), access_gic_sgi }, /* ICC_ASGI1R */
3691 { Op1( 2), CRn( 0), CRm(12), Op2( 0), access_gic_sgi }, /* ICC_SGI0R */
3824 params.Op2 = 0; in kvm_handle_cp_64()
3879 params->Op2 = 0; in kvm_esr_cp10_id_to_sys64()
3883 params->Op2 = 1; in kvm_esr_cp10_id_to_sys64()
3887 params->Op2 = 2; in kvm_esr_cp10_id_to_sys64()
4275 params->Op2 = ((id & KVM_REG_ARM64_SYSREG_OP2_MASK) in index_to_params()
4540 (reg->Op2 << KVM_REG_ARM64_SYSREG_OP2_SHIFT)); in sys_reg_to_index()