Lines Matching full:aarch32

42  * For AArch32, we only take care of what is being trapped. Anything
434  * for both AArch64 and AArch32 accesses.
455 	if (p->Op0 == 0) {		/* AArch32 */
1304 	/* The LC bit is RES1 when AArch32 is not supported */
1637 	 * AArch32 ID registers are UNKNOWN if AArch32 isn't implemented at any
2337 	/* AArch64 mappings of the AArch32 ID registers */
2840 	/* AArch32 SPSR_* are RES0 if trapped from a NV guest */
3375  * AArch32 debug register mappings
3377  * AArch32 DBGBVRn is mapped to DBGBVRn_EL1[31:0]
3378  * AArch32 DBGBXVRn is mapped to DBGBVRn_EL1[63:32]
3829 	 * backends between AArch32 and AArch64, we get away with it.
3860  * from AArch32.
3903  *			  VFP Register' from AArch32.
3930  *			       CRn=0, which corresponds to the AArch32 feature
3935  * Our cp15 system register tables do not enumerate the AArch32 feature
3936  * registers. Conveniently, our AArch64 table does, and the AArch32 system
3959 	 * All registers where CRm > 3 are known to be UNKNOWN/RAZ from AArch32.
4010 	 * Certain AArch32 ID registers are handled by rerouting to the AArch64