25 		return read_gicreg(ICH_LR0_EL2);  in __gic_v3_get_lr()
27 		return read_gicreg(ICH_LR1_EL2);  in __gic_v3_get_lr()
29 		return read_gicreg(ICH_LR2_EL2);  in __gic_v3_get_lr()
31 		return read_gicreg(ICH_LR3_EL2);  in __gic_v3_get_lr()
33 		return read_gicreg(ICH_LR4_EL2);  in __gic_v3_get_lr()
35 		return read_gicreg(ICH_LR5_EL2);  in __gic_v3_get_lr()
37 		return read_gicreg(ICH_LR6_EL2);  in __gic_v3_get_lr()
39 		return read_gicreg(ICH_LR7_EL2);  in __gic_v3_get_lr()
41 		return read_gicreg(ICH_LR8_EL2);  in __gic_v3_get_lr()
43 		return read_gicreg(ICH_LR9_EL2);  in __gic_v3_get_lr()
45 		return read_gicreg(ICH_LR10_EL2);  in __gic_v3_get_lr()
47 		return read_gicreg(ICH_LR11_EL2);  in __gic_v3_get_lr()
49 		return read_gicreg(ICH_LR12_EL2);  in __gic_v3_get_lr()
51 		return read_gicreg(ICH_LR13_EL2);  in __gic_v3_get_lr()
53 		return read_gicreg(ICH_LR14_EL2);  in __gic_v3_get_lr()
55 		return read_gicreg(ICH_LR15_EL2);  in __gic_v3_get_lr()
157 		val = read_gicreg(ICH_AP0R0_EL2);  in __vgic_v3_read_ap0rn()
160 		val = read_gicreg(ICH_AP0R1_EL2);  in __vgic_v3_read_ap0rn()
163 		val = read_gicreg(ICH_AP0R2_EL2);  in __vgic_v3_read_ap0rn()
166 		val = read_gicreg(ICH_AP0R3_EL2);  in __vgic_v3_read_ap0rn()
181 		val = read_gicreg(ICH_AP1R0_EL2);  in __vgic_v3_read_ap1rn()
184 		val = read_gicreg(ICH_AP1R1_EL2);  in __vgic_v3_read_ap1rn()
187 		val = read_gicreg(ICH_AP1R2_EL2);  in __vgic_v3_read_ap1rn()
190 		val = read_gicreg(ICH_AP1R3_EL2);  in __vgic_v3_read_ap1rn()
219 		elrsr = read_gicreg(ICH_ELRSR_EL2);  in __vgic_v3_save_state()
303 	write_gicreg(read_gicreg(ICC_SRE_EL2) & ~ICC_SRE_EL2_ENABLE,  in __vgic_v3_activate_traps()
322 		cpu_if->vgic_vmcr = read_gicreg(ICH_VMCR_EL2);  in __vgic_v3_deactivate_traps()
325 	val = read_gicreg(ICC_SRE_EL2);  in __vgic_v3_deactivate_traps()
348 	val = read_gicreg(ICH_VTR_EL2);  in __vgic_v3_save_aprs()
381 	val = read_gicreg(ICH_VTR_EL2);  in __vgic_v3_restore_aprs()
411 	int max_lr_idx = vtr_to_max_lr_idx(read_gicreg(ICH_VTR_EL2));  in __vgic_v3_init_lrs()
426 	u64 val, sre = read_gicreg(ICC_SRE_EL1);  in __vgic_v3_get_gic_config()
452 	val = read_gicreg(ICC_SRE_EL1);  in __vgic_v3_get_gic_config()
463 	val |= read_gicreg(ICH_VTR_EL2);  in __vgic_v3_get_gic_config()
470 	return read_gicreg(ICH_VMCR_EL2);  in __vgic_v3_read_vmcr()
500 	return 8 - vtr_to_nr_pre_bits(read_gicreg(ICH_VTR_EL2));  in __vgic_v3_bpr_min()
574 	u8 nr_apr_regs = vtr_to_nr_apr_regs(read_gicreg(ICH_VTR_EL2));  in __vgic_v3_get_highest_active_priority()
667 	u8 nr_apr_regs = vtr_to_nr_apr_regs(read_gicreg(ICH_VTR_EL2));  in __vgic_v3_clear_highest_active_priority()
754 	hcr = read_gicreg(ICH_HCR_EL2);  in __vgic_v3_bump_eoicount()
1010 	vtr = read_gicreg(ICH_VTR_EL2);  in __vgic_v3_read_ctlr()