Lines Matching +full:fiq +full:- +full:based

1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012,2013 - ARM Ltd
8 * Based on arch/arm/kvm/emulate.c
9 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
63 vcpu->arch.ctxt.spsr_abt = val; in __vcpu_write_spsr_abt()
71 vcpu->arch.ctxt.spsr_und = val; in __vcpu_write_spsr_und()
77 * The EL passed to this function *must* be a non-secure, privileged mode with
85 * For the SPSR_ELx layout for AArch64, see ARM DDI 0487E.a page C5-429.
86 * For the SPSR_ELx layout for AArch32, see ARM DDI 0487E.a page C5-426.
134 if (kvm_has_mte(kern_hyp_va(vcpu->kvm))) in enter_exception64()
140 // See ARM DDI 0487E.a, page D5-2579. in enter_exception64()
143 // SCTLR_ELx.SPAN is RES1 when ARMv8.1-PAN is not implemented in enter_exception64()
144 // See ARM DDI 0487E.a, page D5-2578. in enter_exception64()
150 // See ARM DDI 0487E.a, page D2-2452. in enter_exception64()
153 // See ARM DDI 0487E.a, page D1-2306. in enter_exception64()
156 // See ARM DDI 0487E.a, page D13-3258 in enter_exception64()
161 // See ARM DDI 0487E.a, pages D1-2293 to D1-2294. in enter_exception64()
183 * - ARM DDI 0406C.d, page B1-1148
184 * - ARM DDI 0487E.a, page G8-6264
187 * - ARM DDI 0487E.a, page C5-426
213 // See ARM DDI 0487E.a, page G8-6244 in get_except32_cpsr()
218 // SCTLR.SPAN is RES1 when ARMv8.1-PAN is not implemented in get_except32_cpsr()
219 // See ARM DDI 0487E.a, page G8-6246 in get_except32_cpsr()
227 // See ARM DDI 0487E.a, page G1-5527 in get_except32_cpsr()
235 // See ARM DDI 0487E.a, page G8-6245 in get_except32_cpsr()
236 // See ARM DDI 0406C.d, page B4-1701 in get_except32_cpsr()
242 // See ARM DDI 0487E.a, pages G1-5515 to G1-5516 in get_except32_cpsr()
243 // See ARM DDI 0406C.d, page B1-1182 in get_except32_cpsr()
249 // See ARM DDI 0487E.a, pages G1-5515 to G1-5516 in get_except32_cpsr()
250 // See ARM DDI 0406C.d, page B1-1182 in get_except32_cpsr()
253 // CPSR.F is set upon an exception to FIQ in get_except32_cpsr()
255 // See ARM DDI 0487E.a, pages G1-5515 to G1-5516 in get_except32_cpsr()
256 // See ARM DDI 0406C.d, page B1-1182 in get_except32_cpsr()
262 // See ARM DDI 0487E.a, page G8-5514 in get_except32_cpsr()
263 // See ARM DDI 0406C.d, page B1-1181 in get_except32_cpsr()
273 * Table taken from ARMv8 ARM DDI0487B-B, table G1-10.
283 [7] = { 4, 4 }, /* FIQ, unused */
301 vcpu_gp_regs(vcpu)->compat_lr_abt = return_address; in enter_exception32()
306 vcpu_gp_regs(vcpu)->compat_lr_und = return_address; in enter_exception32()