60 static int get_ia_size(struct s1_walk_info *wi)  in get_ia_size()  argument
62 	return 64 - wi->txsz;  in get_ia_size()
66 static bool check_output_size(u64 ipa, struct s1_walk_info *wi)  in check_output_size()  argument
68 	return wi->max_oa_bits < 48 && (ipa & GENMASK_ULL(47, wi->max_oa_bits));  in check_output_size()
90 static int setup_s1_walk(struct kvm_vcpu *vcpu, u32 op, struct s1_walk_info *wi,  in setup_s1_walk()  argument
99 	wi->regime = compute_translation_regime(vcpu, op);  in setup_s1_walk()
104 	if (wi->regime == TR_EL2 && va55)  in setup_s1_walk()
107 	wi->s2 = wi->regime == TR_EL10 && (hcr & (HCR_VM | HCR_DC));  in setup_s1_walk()
109 	switch (wi->regime) {  in setup_s1_walk()
129 	tbi = (wi->regime == TR_EL2 ?  in setup_s1_walk()
141 	switch (wi->regime) {  in setup_s1_walk()
175 	wi->be = sctlr & SCTLR_ELx_EE;  in setup_s1_walk()
177 	wi->hpd  = kvm_has_feat(vcpu->kvm, ID_AA64MMFR1_EL1, HPDS, IMP);  in setup_s1_walk()
178 	wi->hpd &= (wi->regime == TR_EL2 ?  in setup_s1_walk()
186 		wi->txsz = FIELD_GET(TCR_T1SZ_MASK, tcr);  in setup_s1_walk()
191 			wi->pgshift = 12;	 break;  in setup_s1_walk()
193 			wi->pgshift = 14;	 break;  in setup_s1_walk()
196 			wi->pgshift = 16;	 break;  in setup_s1_walk()
199 		wi->txsz = FIELD_GET(TCR_T0SZ_MASK, tcr);  in setup_s1_walk()
204 			wi->pgshift = 12;	 break;  in setup_s1_walk()
206 			wi->pgshift = 14;	 break;  in setup_s1_walk()
209 			wi->pgshift = 16;	 break;  in setup_s1_walk()
215 		if (wi->txsz > 39)  in setup_s1_walk()
218 		if (wi->txsz > 48 || (BIT(wi->pgshift) == SZ_64K && wi->txsz > 47))  in setup_s1_walk()
223 	switch (BIT(wi->pgshift)) {  in setup_s1_walk()
226 		lva &= tcr & (wi->regime == TR_EL2 ? TCR_EL2_DS : TCR_DS);  in setup_s1_walk()
230 		lva &= tcr & (wi->regime == TR_EL2 ? TCR_EL2_DS : TCR_DS);  in setup_s1_walk()
237 	if ((lva && wi->txsz < 12) || (!lva && wi->txsz < 16))  in setup_s1_walk()
240 	ia_bits = get_ia_size(wi);  in setup_s1_walk()
248 	if (wi->regime != TR_EL2 &&  in setup_s1_walk()
258 	stride = wi->pgshift - 3;  in setup_s1_walk()
259 	wi->sl = 3 - (((ia_bits - 1) - wi->pgshift) / stride);  in setup_s1_walk()
261 	ps = (wi->regime == TR_EL2 ?  in setup_s1_walk()
264 	wi->max_oa_bits = min(get_kvm_ipa_limit(), ps_to_output_size(ps));  in setup_s1_walk()
267 	x = 3 + ia_bits - ((3 - wi->sl) * stride + wi->pgshift);  in setup_s1_walk()
269 	wi->baddr = ttbr & TTBRx_EL1_BADDR;  in setup_s1_walk()
272 	if (check_output_size(wi->baddr, wi))  in setup_s1_walk()
275 	wi->baddr &= GENMASK_ULL(wi->max_oa_bits - 1, x);  in setup_s1_walk()
288 static int walk_s1(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,  in walk_s1()  argument
294 	level = wi->sl;  in walk_s1()
295 	stride = wi->pgshift - 3;  in walk_s1()
296 	baddr = wi->baddr;  in walk_s1()
298 	va_top = get_ia_size(wi) - 1;  in walk_s1()
303 		va_bottom = (3 - level) * stride + wi->pgshift;  in walk_s1()
308 		if (wi->s2) {  in walk_s1()
336 		if (wi->be)  in walk_s1()
354 		if (!wi->hpd) {  in walk_s1()
360 		baddr = desc & GENMASK_ULL(47, wi->pgshift);  in walk_s1()
363 		if (check_output_size(baddr, wi))  in walk_s1()
375 		switch (BIT(wi->pgshift)) {  in walk_s1()
389 	if (check_output_size(desc & GENMASK(47, va_bottom), wi))  in walk_s1()
392 	va_bottom += contiguous_bit_shift(desc, wi, level);  in walk_s1()
754 	struct s1_walk_info wi = {};  in handle_at_slow()  local
757 	ret = setup_s1_walk(vcpu, op, &wi, &wr, vaddr);  in handle_at_slow()
766 	ret = walk_s1(vcpu, &wi, &wr, vaddr);  in handle_at_slow()
775 	if (wi.regime != TR_EL2) {  in handle_at_slow()
816 			pan &= ur || uw || (pan3_enabled(vcpu, wi.regime) && ux);  in handle_at_slow()
867 	return compute_par_s1(vcpu, &wr, wi.regime);  in handle_at_slow()