Lines Matching +full:reserved +full:- +full:cpu +full:- +full:vectors

1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Low-level CPU initialisation
6 * Copyright (C) 1994-2002 Russell King
7 * Copyright (C) 2003-2012 ARM Ltd.
21 #include <asm/asm-offsets.h>
27 #include <asm/kernel-pgtable.h>
30 #include <asm/pgtable-hwdef.h>
38 #include "efi-header.S"
46 * ---------------------------
49 * MMU = off, D-cache = off, I-cache = on or off,
52 * Note that the callee-saved registers are used for storing variables
58 * DO NOT MODIFY. Image header expected by Linux boot-loaders.
62 .quad 0 // Image load offset from start of RAM, little-endian
63 le64sym _kernel_size_le // Effective size of kernel image, little-endian
64 le64sym _kernel_flags_le // Informative flags, little-endian
65 .quad 0 // reserved
66 .quad 0 // reserved
67 .quad 0 // reserved
81 * x20 primary_entry() .. __primary_switch() CPU boot mode
96 * If the page tables have been populated with non-cacheable
123 * The following calls CPU setup code, see arch/arm64/mm/proc.S for
125 * On return, the CPU will be ready for the MMU to be turned on and
187 * Initialize CPU registers with task-specific and cpu-specific context.
189 * Create a final frame record at task_pt_regs(current)->stackframe, so
221 adr_l x8, vectors // load VBAR_EL1 with virtual
225 stp x29, x30, [sp, #-16]!
254 * Starting from EL2 or EL1, configure the CPU to execute at the highest
301 * Compliant CPUs advertise their VHE-onlyness with
310 tbz x1, #(ID_AA64MMFR4_EL1_E2H0_SHIFT + ID_AA64MMFR4_EL1_E2H0_WIDTH - 1), 1f
403 adr_l x5, vectors
428 * Sets the __boot_cpu_mode flag depending on the CPU boot mode passed
436 1: str w0, [x1] // Save CPU boot mode
441 * The booting CPU updates the failed status @__early_cpu_boot_status,
445 * - Corrupts tmp1, tmp2
446 * - Writes 'status' to __early_cpu_boot_status and makes sure
468 * Checks if the selected granule size is supported by the CPU.
469 * If it isn't, park the CPU
512 /* Indicate that this CPU can't boot and is stuck in the kernel */