Lines Matching refs:ARM64_FTR_REG

726 #define ARM64_FTR_REG(id, table)		\  macro
747 ARM64_FTR_REG(SYS_ID_PFR0_EL1, ftr_id_pfr0),
748 ARM64_FTR_REG(SYS_ID_PFR1_EL1, ftr_id_pfr1),
749 ARM64_FTR_REG(SYS_ID_DFR0_EL1, ftr_id_dfr0),
750 ARM64_FTR_REG(SYS_ID_MMFR0_EL1, ftr_id_mmfr0),
751 ARM64_FTR_REG(SYS_ID_MMFR1_EL1, ftr_generic_32bits),
752 ARM64_FTR_REG(SYS_ID_MMFR2_EL1, ftr_generic_32bits),
753 ARM64_FTR_REG(SYS_ID_MMFR3_EL1, ftr_generic_32bits),
756 ARM64_FTR_REG(SYS_ID_ISAR0_EL1, ftr_id_isar0),
757 ARM64_FTR_REG(SYS_ID_ISAR1_EL1, ftr_generic_32bits),
758 ARM64_FTR_REG(SYS_ID_ISAR2_EL1, ftr_generic_32bits),
759 ARM64_FTR_REG(SYS_ID_ISAR3_EL1, ftr_generic_32bits),
760 ARM64_FTR_REG(SYS_ID_ISAR4_EL1, ftr_id_isar4),
761 ARM64_FTR_REG(SYS_ID_ISAR5_EL1, ftr_id_isar5),
762 ARM64_FTR_REG(SYS_ID_MMFR4_EL1, ftr_id_mmfr4),
763 ARM64_FTR_REG(SYS_ID_ISAR6_EL1, ftr_id_isar6),
766 ARM64_FTR_REG(SYS_MVFR0_EL1, ftr_mvfr0),
767 ARM64_FTR_REG(SYS_MVFR1_EL1, ftr_mvfr1),
768 ARM64_FTR_REG(SYS_MVFR2_EL1, ftr_mvfr2),
769 ARM64_FTR_REG(SYS_ID_PFR2_EL1, ftr_id_pfr2),
770 ARM64_FTR_REG(SYS_ID_DFR1_EL1, ftr_id_dfr1),
771 ARM64_FTR_REG(SYS_ID_MMFR5_EL1, ftr_id_mmfr5),
778 ARM64_FTR_REG(SYS_ID_AA64PFR2_EL1, ftr_id_aa64pfr2),
783 ARM64_FTR_REG(SYS_ID_AA64FPFR0_EL1, ftr_id_aa64fpfr0),
786 ARM64_FTR_REG(SYS_ID_AA64DFR0_EL1, ftr_id_aa64dfr0),
787 ARM64_FTR_REG(SYS_ID_AA64DFR1_EL1, ftr_raz),
790 ARM64_FTR_REG(SYS_ID_AA64ISAR0_EL1, ftr_id_aa64isar0),
795 ARM64_FTR_REG(SYS_ID_AA64ISAR3_EL1, ftr_id_aa64isar3),
804 ARM64_FTR_REG(SYS_ID_AA64MMFR3_EL1, ftr_id_aa64mmfr3),
805 ARM64_FTR_REG(SYS_ID_AA64MMFR4_EL1, ftr_id_aa64mmfr4),
808 ARM64_FTR_REG(SYS_GMID_EL1, ftr_gmid),
812 ARM64_FTR_REG(SYS_DCZID_EL0, ftr_dczid),
815 ARM64_FTR_REG(SYS_CNTFRQ_EL0, ftr_single32),