include/asm/ptrace.h

1 /* SPDX-License-Identifier: GPL-2.0-only */
5  * Copyright (C) 1996-2003 Russell King
24 #include <linux/irqchip/arm-gic-v3-prio.h>
35 /* AArch32-specific ptrace requests */
68 #define PSR_AA32_IT_MASK	0x0600fc00	/* If-Then execution state mask */
90  * a syscall -- i.e., its most recent entry into the kernel from
93  * This must have the value -1, for ABI compatibility with ptrace etc.
95 #define NO_SYSCALL (-1)
104 /* Architecturally defined mapping between AArch32 and AArch64 registers */
185 	return regs->syscallno != NO_SYSCALL;  in in_syscall()
190 	regs->syscallno = NO_SYSCALL;  in forget_syscall()
199 	(((regs)->pstate & PSR_AA32_T_BIT))
205 	(((regs)->pstate & PSR_MODE_MASK) == PSR_MODE_EL0t)
208 	(((regs)->pstate & (PSR_MODE32_BIT | PSR_MODE_MASK)) == \
212 	((regs)->pstate & PSR_MODE_MASK)
216 		(regs)->pmr_save == GIC_PRIO_IRQON :			\
220 	(!((regs)->pstate & PSR_I_BIT) && irqs_priority_unmasked(regs))
223 	(!((regs)->pstate & PSR_F_BIT))
228 		return regs->compat_sp;  in user_stack_pointer()
229 	return regs->sp;  in user_stack_pointer()
237  * regs_get_register() - get register value from its offset
254 		val = regs->regs[offset];  in regs_get_register()
257 		val = regs->sp;  in regs_get_register()
260 		val = regs->pc;  in regs_get_register()
263 		val = regs->pstate;  in regs_get_register()
278 	return (r == 31) ? 0 : regs->regs[r];  in pt_regs_read_reg()
289 		regs->regs[r] = val;  in pt_regs_write_reg()
295 	return regs->sp;  in kernel_stack_pointer()
300 	unsigned long val = regs->regs[0];  in regs_return_value()
304 	 * syscall_get_return_value(). Apply the same sign-extension here until  in regs_return_value()
315 	regs->regs[0] = rc;  in regs_set_return_value()
319  * regs_get_kernel_argument() - get Nth function argument in kernel
346 	return regs->pc;  in instruction_pointer()
351 	regs->pc = val;  in instruction_pointer_set()
356 	return regs->regs[29];  in frame_pointer()
359 #define procedure_link_pointer(regs)	((regs)->regs[30])