include/asm/fpsimdmacros.h

1 /* SPDX-License-Identifier: GPL-2.0-only */
28 	mrs	x\tmpnr, fpsr
30 	mrs	x\tmpnr, fpcr
36 	 * Writes to fpcr may be self-synchronising, so avoid restoring
65 	msr	fpsr, x\tmpnr
67 	fpsimd_restore_fpcr x\tmpnr, \state
70 /* Sanity-check macros to help avoid encoding garbage instructions */
102 /* SVE instruction encodings for non-SVE-capable assemblers */
105 /* STR (vector): STR Z\nz, [X\nxbase, #\offset, MUL VL] */
106 .macro _sve_str_v nz, nxbase, offset=0
109 	_check_num (\offset), -0x100, 0xff
113 		| (((\offset) & 7) << 10)	\
114 		| (((\offset) & 0x1f8) << 13)
117 /* LDR (vector): LDR Z\nz, [X\nxbase, #\offset, MUL VL] */
118 .macro _sve_ldr_v nz, nxbase, offset=0
121 	_check_num (\offset), -0x100, 0xff
125 		| (((\offset) & 7) << 10)	\
126 		| (((\offset) & 0x1f8) << 13)
129 /* STR (predicate): STR P\np, [X\nxbase, #\offset, MUL VL] */
130 .macro _sve_str_p np, nxbase, offset=0
133 	_check_num (\offset), -0x100, 0xff
137 		| (((\offset) & 7) << 10)	\
138 		| (((\offset) & 0x1f8) << 13)
141 /* LDR (predicate): LDR P\np, [X\nxbase, #\offset, MUL VL] */
142 .macro _sve_ldr_p np, nxbase, offset=0
145 	_check_num (\offset), -0x100, 0xff
149 		| (((\offset) & 7) << 10)	\
150 		| (((\offset) & 0x1f8) << 13)
153 /* RDVL X\nx, #\imm */
156 	_check_num (\imm), -0x20, 0x1f
183 /* SME instruction encodings for non-SME-capable assemblers */
186 /* RDSVL X\nx, #\imm */
189 	_check_num (\imm), -0x20, 0x1f
197  *	STR ZA[\nw, #\offset], [X\nxbase, #\offset, MUL VL]
199 .macro _sme_str_zav nw, nxbase, offset=0
202 	_check_num (\offset), -0x100, 0xff
206 		| ((\offset) & 7)
211  *	LDR ZA[\nw, #\offset], [X\nxbase, #\offset, MUL VL]
213 .macro _sme_ldr_zav nw, nxbase, offset=0
216 	_check_num (\offset), -0x100, 0xff
220 		| ((\offset) & 7)
249 		__for %\from, %((\from) + ((\to) - (\from)) / 2)
250 		__for %((\from) + ((\to) - (\from)) / 2 + 1), %\to
275 		msr_s		SYS_ZCR_EL1, \xtmp2	//self-synchronising
286 		msr_s		SYS_SMCR_EL1, \xtmp2	//self-synchronising
290 /* Preserve the first 128-bits of Znz and zero the rest. */
307  _for n, 0, 31,	_sve_str_v	\n, \nxbase, \n - 34
308  _for n, 0, 15,	_sve_str_p	\n, \nxbase, \n - 16
316 		_sve_ldr_p	0, \nxbase, -16
317 		mrs		x\nxtmp, fpsr
319 		mrs		x\nxtmp, fpcr
324  _for n, 0, 31,	_sve_ldr_v	\n, \nxbase, \n - 34
329  _for n, 0, 15,	_sve_ldr_p	\n, \nxbase, \n - 16
332 		msr		fpsr, x\nxtmp
334 		msr		fpcr, x\nxtmp
342 	add	x\nxbase, x\nxbase, \xvl
343 	add	x\nw, x\nw, #1
344 	cmp	\xvl, x\nw
353 	add	x\nxbase, x\nxbase, \xvl
354 	add	x\nw, x\nw, #1
355 	cmp	\xvl, x\nw